Design of Low Voltage Vertical Channel Face-tunneling TFET Using Ge/SiGe Materials and Its SRAM Circuit Performance

Akancha Gupta, C. K. Chiang, W. Y. Yang, E. R. Hsieh, Steve S. Chung

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

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Engineering