@inproceedings{ae92dc7300a24779851f144465649e9e,
title = "Design of Low Voltage Vertical Channel Face-tunneling TFET Using Ge/SiGe Materials and Its SRAM Circuit Performance",
abstract = "A novel vertical channel face-tunneling field effect transistor (VC-TFET) using Ge/SiGe material is proposed in this paper. The proposed device structure enhances the on-state drive current without increasing the device footprint and also provides lower off-state leakage current, steeper sub-threshold slope and higher Ion/Ioff current ratio compared to the other TFETs. The design of SiGe-material in the drain region suppresses the leakage current, and the channel region with small bandgap Ge enhances the tunneling current. Additionally, the complementary vertical channel TFET is also used to demonstrate the SRAM circuit performance for low power application. Novel SRAM topologies are proposed to eliminate the read disturb and enhance the RSNM/WSNM of SRAM.",
author = "Akancha Gupta and Chiang, {C. K.} and Yang, {W. Y.} and Hsieh, {E. R.} and Chung, {Steve S.}",
note = "Publisher Copyright: {\textcopyright} 2020 IEEE.; 2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020 ; Conference date: 10-08-2020 Through 13-08-2020",
year = "2020",
month = aug,
doi = "10.1109/VLSI-TSA48913.2020.9203664",
language = "???core.languages.en_GB???",
series = "2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "132--133",
booktitle = "2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020",
}