A new ROM size reduction technique for direct digital frequency synthesizers (DDFS's) is proposed in this paper. In the new technique, a multiple-segment piecewise polynomial function g(x) is determined for the sinusoidal ROM table which stores the values of sin(πx/2) - g(x) instead of sin(πx/2). With use of the proposed three-segment technique for 20-bit phase to II-bit amplitude mapping, the number of ROM output bits and ROM size are reduced by 5 and 98.58%, respectively, compared to the quarter sine wave technique with comparable spectral purity. The compression ratio of the proposed technique is about 70:1. This new design can gain low power and small chip area, especially for high frequency resolution applications.