Design of direct digital frequency synthesizer with high ROM compression ratio

Li Wen Hsu, Dah Chung Chang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

A new ROM size reduction technique for direct digital frequency synthesizers (DDFS's) is proposed in this paper. In the new technique, a multiple-segment piecewise polynomial function g(x) is determined for the sinusoidal ROM table which stores the values of sin(πx/2) - g(x) instead of sin(πx/2). With use of the proposed three-segment technique for 20-bit phase to II-bit amplitude mapping, the number of ROM output bits and ROM size are reduced by 5 and 98.58%, respectively, compared to the quarter sine wave technique with comparable spectral purity. The compression ratio of the proposed technique is about 70:1. This new design can gain low power and small chip area, especially for high frequency resolution applications.

Original languageEnglish
Title of host publicationProceedings of the IEEE International Conference on Electronics, Circuits, and Systems
DOIs
StatePublished - 2005
Event12th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2005 - Gammarth, Tunisia
Duration: 11 Dec 200514 Dec 2005

Publication series

NameProceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Conference

Conference12th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2005
Country/TerritoryTunisia
CityGammarth
Period11/12/0514/12/05

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