Design of cost-efficient memory-based FFT processors using single-port memories

Yao Xian Yang, Jin Fu Li, Hsiang Ning Liu, Chin Long Wey

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

This paper proposes a new memory-based FFT processor. Only an N-bit single-port memories are required for implementing an N-point FFT processor. This reduces the area, power, and test cost of the proposed memory-based FFT processor. Moreover, a time/space-embedded signal flow graph is proposed to verify the functionality of our proposed memorybased FFT processor. Experimental results show that area cost of the memories in the proposed FFT processor is much lower than those described in the existing works.

Original languageEnglish
Title of host publicationProceedings - 20th Anniversary IEEE International SOC Conference
Pages29-32
Number of pages4
DOIs
StatePublished - 2007
Event20th Anniversary IEEE International SOC Conference - Hsinchu, Taiwan
Duration: 26 Sep 200729 Sep 2007

Publication series

NameProceedings - 20th Anniversary IEEE International SOC Conference

Conference

Conference20th Anniversary IEEE International SOC Conference
Country/TerritoryTaiwan
CityHsinchu
Period26/09/0729/09/07

Fingerprint

Dive into the research topics of 'Design of cost-efficient memory-based FFT processors using single-port memories'. Together they form a unique fingerprint.

Cite this