Design of an SVD engine for 8×8 MIMO precoding systems

Chun Hun Wu, Chin Yi Liu, Pei Yun Tsai

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

A singular-value-decomposition (SVD) engine for 8×8 MIMO precoding systems is designed and implemented. The memory-based architecture is adopted with eight processing elements, each having two CORDIC modules. Two-phase operations are performed including bidiagonalization and Golub-Reinsch SVD (GR-SVD) with Rayleigh quotient shift. The split, deflation, and shift techniques of GR-SVD can effectively decrease the processed matrix size and accelerate the diagonalization to enhance the throughput. To cover the wide distribution of singular vector elements and singular values derived from 8 × 8 MIMO channel matrix, hybrid datapath representations are used. The thresholds for split and deflation can be adjusted and thus the accuracy of the SVD engine is variable according to the requirements. From the synthesis results, the SVD engine in 45nm CMOS technology is able to provide the throughput rate of 636K matrix/s and outperforms the previous design.

Original languageEnglish
Title of host publicationIEEE International Symposium on Circuits and Systems
Subtitle of host publicationFrom Dreams to Innovation, ISCAS 2017 - Conference Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781467368520
DOIs
StatePublished - 25 Sep 2017
Event50th IEEE International Symposium on Circuits and Systems, ISCAS 2017 - Baltimore, United States
Duration: 28 May 201731 May 2017

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Conference

Conference50th IEEE International Symposium on Circuits and Systems, ISCAS 2017
Country/TerritoryUnited States
CityBaltimore
Period28/05/1731/05/17

Keywords

  • 8 × 8 MIMO precoding
  • deflation
  • singular value decomposition
  • split
  • VLSI

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