Design of a neural recording amplifier with tunable pseudo resistors

Kai Wen Yao, Cihun Siyong Alex Gong, Shan Ci Yang, Muh Tian Shiue

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Scopus citations

Abstract

This paper describes a voltage-controlled pseudo-resistor with widely available operating voltage range applied to neural recording amplifier designs. The proposed pseudo-resistor which consists of serial-connected PMOS device and an auto-tuning circuit provides ultra-high resistance to cancel DC offset from electrode-electrolyte interface. The proposed design has been estimated in standard CMOS 0.18-m process, achieving midband gain of 40 dB, bandwidth from 0.4 Hz to 7 kHz, input-referred noise of 5.98 Vrms, calculated NEF of 7.2, and 3.1-W power consumption.

Original languageEnglish
Title of host publicationProceedings - IEEE International SOC Conference, SOCC 2011
Pages376-379
Number of pages4
DOIs
StatePublished - 2011
Event24th IEEE International System on Chip Conference, SOCC 2011 - Taipei, Taiwan
Duration: 26 Sep 201128 Sep 2011

Publication series

NameInternational System on Chip Conference
ISSN (Print)2164-1676
ISSN (Electronic)2164-1706

Conference

Conference24th IEEE International System on Chip Conference, SOCC 2011
Country/TerritoryTaiwan
CityTaipei
Period26/09/1128/09/11

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