Design and Dataflow for Multibit SRAM-Based MAC Operations

Chuan Han Cheng, Shih Hsu Huang, Jin Fu Li

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

Computing-in-memory (CIM) is considered as a promising approach to improve the energy efficiency of multiply-and-accumulate (MAC) operations. A lot of research efforts have been paid to SRAM-based MAC design. However, most SRAM-based MAC designs provide limited precision. In this paper, we propose a 2-bit x 2-bit SRAM-based MAC unit as a primitive unit for higher precision dot multiplications. Then, we study the design and dataflow for the utilization of primitive cells. A 4-bit x 4-bit SRAM-based MAC design is presented to demonstrate the proposed methodology.

Original languageEnglish
Title of host publicationProceedings - International SoC Design Conference 2022, ISOCC 2022
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages159-160
Number of pages2
ISBN (Electronic)9781665459716
DOIs
StatePublished - 2022
Event19th International System-on-Chip Design Conference, ISOCC 2022 - Gangneung-si, Korea, Republic of
Duration: 19 Oct 202222 Oct 2022

Publication series

NameProceedings - International SoC Design Conference 2022, ISOCC 2022

Conference

Conference19th International System-on-Chip Design Conference, ISOCC 2022
Country/TerritoryKorea, Republic of
CityGangneung-si
Period19/10/2222/10/22

Keywords

  • Computing-in-memory;multiply-and-accumulate
  • SRAMs

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