Design and analysis of CMOS low-phase-noise low-jitter subharmonically injection-locked VCO with FLL self-alignment technique

Keyphrases

• Low Jitter 100%
• Low Phase Noise 100%
• Voltage-controlled Oscillator 100%
• Injection Locking 100%
• Frequency Locked Loops 100%
• Self-alignment Technique 100%
• Phase Noise 75%
• Subharmonics 75%
• K-band 25%
• Operation Frequency 25%
• Power Output 25%
• Input Frequency 25%
• Millimeter-wave Band 25%
• Locking Range 25%
• Excellent Performance 25%
• 90-nm CMOS Technology 25%
• CMOS Process 25%
• Jitter 25%
• Clock Generator 25%
• Non-minimum Phase 25%
• Design Considerations 25%
• Control Voltage 25%
• Innovative Methods 25%
• Noise Evaluation 25%
• Design Phase 25%
• Silicon Technology 25%
• Quality Robustness 25%
• Phase Jitter 25%
• Performance Robustness 25%

Engineering

• Locked Loop 100%
• Phase Noise 100%
• Voltage-Controlled Oscillator 100%
• Frequency Operation 20%
• Output Power 20%
• Input Frequency 20%
• Millimeter Wave 20%
• K-Band 20%
• Design Consideration 20%
• Design Phase 20%