DC-16 GHz GaAs track-And-hold amplifier using sampling rate and linearity enhancement techniques

Y. A. Lin, H. Y. Chang, Y. C. Wang

Research output: Contribution to journalArticlepeer-review

4 Scopus citations

Abstract

A DC-16 GHz track-And-hold amplifier (THA) using 0.15-μm enhancement-mode GaAs pseudomorphic high-electron mobility transistor process is presented. A switched source follower (SSF) track-And-hold (T/H) stage is modified to enhance the sampling rate and linearity. The input-dependent timing jitter is highly reduced using the modified topology as compared to the conventional SSF T/H stage. Moreover, the even harmonics are successfully suppressed using the differential topology, and the spurious-free dynamic range (SFDR) and total harmonic distortion (THD) are improved. To widen bandwidth (BW), the input and output buffers are designed using the distributed amplifier and source follower, respectively. With a sampling rate of 13.5 GS/s, the proposed THA features a measured 3-dB BW of 16 GHz, an SFDR of 46 dB, and a THD of -45 dB.

Original languageEnglish
Pages (from-to)83-85
Number of pages3
JournalElectronics Letters
Volume54
Issue number2
DOIs
StatePublished - 25 Jan 2018

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