CMOS current-mode design of an S-shape correction curve generator

K. J. Lin, H. C. Su, C. J. Cheng, J. E. Chen

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A high speed and low power CMOS current-mode circuit design is proposed for generating an S-shape correction curve. We divide the correction curve into three segments to reduce the polynomial order for curve fitting. We assemble three simple current-mode circuits to construct an S-shape correction curve generator. The circuit consists of only 16 transistors and 3 current sources. The μ3dB bandwidth and the maximum power dissipation are 285 MHz and 2.97 mW, respectively. The input

Original languageEnglish
Title of host publicationISCE 2011 - 15th IEEE International Symposium on Consumer Electronics
Pages318-322
Number of pages5
DOIs
StatePublished - 2011
Event15th IEEE International Symposium on Consumer Electronics, ISCE 2011 - Singapore, Singapore
Duration: 14 Jun 201117 Jun 2011

Publication series

NameProceedings of the International Symposium on Consumer Electronics, ISCE

Conference

Conference15th IEEE International Symposium on Consumer Electronics, ISCE 2011
Country/TerritorySingapore
CitySingapore
Period14/06/1117/06/11

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