CAMEL: An efficient fault simulator with coupling fault simulation enhancement for CAMs

Hsiang Huang Wu, Jin Fu Li, Chi Feng Wu, Cheng Wen Wu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

Content addressable memories (CAMs) are widely used in digital systems. A test algorithm for CAMs must be able to cover the random access memory (RAM) faults and comparison faults. However, CAM circuits are usually customized for different products, so there are no standard tests, i.e., tests should be adapted to a specific design manufactured using specific technology. This paper presents a fault simulator, called CAM Evaluation tooL (CAMEL), for the evaluation of fault coverage of CAM test algorithms. It supports five common functional outputs, i.e., Data I/O, hit, multi-hit, matchout, and priority address for various CAM specifications. Since coupling fault simulation dominates the efficiency of a memory fault simulator, a concept of observability is proposed to simplify the coupling fault behavior. By exploiting the observability, a compression technique is also proposed to speed up the fault simulation and reduce memory usage. CAMEL can support both RAM faults and comparison faults. We have demonstrated the CAMEL using widely-used March tests and CAM tests. Simulation results show that the CAMEL can evaluate the fault coverage of tests accurately and efficiently.

Original languageEnglish
Title of host publicationProceedings of the 16th Asian Test Symposium, ATS 2007
Pages355-360
Number of pages6
DOIs
StatePublished - 2007
Event16th Asian Test Symposium, ATS 2007 - Beijing, China
Duration: 8 Oct 200711 Oct 2007

Publication series

NameProceedings of the Asian Test Symposium
ISSN (Print)1081-7735

Conference

Conference16th Asian Test Symposium, ATS 2007
Country/TerritoryChina
CityBeijing
Period8/10/0711/10/07

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