TY - JOUR
T1 - B∗-Sort
T2 - Enabling Write-Once Sorting for Nonvolatile Memory
AU - Liang, Yu Pei
AU - Chen, Tseng Yi
AU - Chang, Yuan Hao
AU - Chen, Shuo Han
AU - Wei, Hsin Wen
AU - Shih, Wei Kuan
N1 - Publisher Copyright:
© 1982-2012 IEEE.
PY - 2020/12
Y1 - 2020/12
N2 - Nonvolatile random access memory (NVRAM) has been regarding a promising technology to replace DRAM as the main memory in embedded systems owing to its nonvolatility and low idle power consumption. However, due to the asymmetric read/write costs and limited lifetime of NVRAM, most of the existing fundamental algorithms are not NVRAM-friendly with their write pattern and write intensiveness. Thus, existing fundamental algorithms for NVRAM embedded devices has been revealed. For instance, as the sorting algorithm is one of the most fundamental algorithms, most of the existing sorting algorithms are not NVRAM-friendly because they impose heavy write traffic [i.e., mathcal {O}(nlg {n}) ] on main memory, where n is the number of unsorted elements. To resolve this issue, this article proposes a write-once sorting algorithm, namely B∗-sort, to reduce the amount of write traffic on NVRAM-based main memory. B∗-sort adopts a brand-new concept, i.e., tree-based sort, inspired by the binary-search-tree structure to achieve the write-once property which can guarantee the optimal endurance during the sorting process. According to the experimental results, B∗-sort can achieve significant performance improvement for sorting on NVRAM-based systems.
AB - Nonvolatile random access memory (NVRAM) has been regarding a promising technology to replace DRAM as the main memory in embedded systems owing to its nonvolatility and low idle power consumption. However, due to the asymmetric read/write costs and limited lifetime of NVRAM, most of the existing fundamental algorithms are not NVRAM-friendly with their write pattern and write intensiveness. Thus, existing fundamental algorithms for NVRAM embedded devices has been revealed. For instance, as the sorting algorithm is one of the most fundamental algorithms, most of the existing sorting algorithms are not NVRAM-friendly because they impose heavy write traffic [i.e., mathcal {O}(nlg {n}) ] on main memory, where n is the number of unsorted elements. To resolve this issue, this article proposes a write-once sorting algorithm, namely B∗-sort, to reduce the amount of write traffic on NVRAM-based main memory. B∗-sort adopts a brand-new concept, i.e., tree-based sort, inspired by the binary-search-tree structure to achieve the write-once property which can guarantee the optimal endurance during the sorting process. According to the experimental results, B∗-sort can achieve significant performance improvement for sorting on NVRAM-based systems.
KW - Nonvolatile memory
KW - read/write asymmetry
KW - sorting algorithm
UR - http://www.scopus.com/inward/record.url?scp=85096762694&partnerID=8YFLogxK
U2 - 10.1109/TCAD.2020.2979819
DO - 10.1109/TCAD.2020.2979819
M3 - 期刊論文
AN - SCOPUS:85096762694
SN - 0278-0070
VL - 39
SP - 4549
EP - 4562
JO - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
JF - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IS - 12
M1 - 9031698
ER -