Application of Three-Repetition Tests Scheme to Improve Integrated Circuits Test Quality to Near-Zero Defect

Chung Huang Yeh, Jwu E. Chen

Research output: Contribution to journalArticlepeer-review

Abstract

In this research, the normal distribution is assumed to be the product characteristic, and the DITM (Digital Integrated Circuit Test Model) model is used to evaluate the integrated circuits (IC) test yield and test quality. Testing technology lags far behind manufacturing technology due to the different rates of development of the two technologies. As a result, quality control will pose significant challenges in pursuing high-quality near-zero defect products (automotive and biomedical electronics and avionics, etc.). In order to ensure product quality, we propose an effective repeated testing method (three-repetition tests scheme, TRTS), which utilizes the move test guardband (TGB) to improve the test yield and test quality. Based on the data in the International Roadmap for Devices and Systems table in 2021, the DITM model is used to estimate the future trend of semiconductor chip test yield, and the retest method (TRTS) is applied improve the test results. The method of repeated testing can increase the test yield and increase the shipment of semiconductor products. By estimating the test cost and profit, the method of repeated testing can obtain chips with near-zero defects with more corporate profits through increased product shipments.

Original languageEnglish
Article number4158
JournalSensors (Switzerland)
Volume22
Issue number11
DOIs
StatePublished - 1 Jun 2022

Keywords

  • defect level
  • guardband test
  • test errors
  • test quality
  • test specification

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