Analysis of the back-gate effect in normally OFF p-GaN gate high-electron mobility transistor

Hsien Chin Chiu, Li Yi Peng, Chih Wei Yang, Hsiang Chun Wang, Yue Ming Hsin, Jen Inn Chyi

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23 Scopus citations


This paper discusses the impact of the back-gate bias on the dc, low-frequency noise, and dynamic behavior characteristics of a p-GaN gate high-electron mobility transistor on silicon substrate. This paper is investigated to understand the physical mechanisms of the back-gate terminal modulation of normally OFF GaN power devices. When a negative back-gate bias VB voltage is applied, the 2-D electron gas channel will get closer to AlGaN/GaN heterointerface and interface scattering, such as interface roughness and alloy-disorder scattering will increases significantly, which may be responsible for the increased ON-state resistance (RON). Meanwhile, the opportunity for the capture of carriers by deep-level traps is reduced and the low-frequency noise is thereby suppressed. Under positive VB bias, RON can be reduced but, according to capacitance-voltage measurements and carrier fluctuations extracted from the low-frequency noise spectra, the transported carriers are obviously trapped by the deep-level.

Original languageEnglish
Article number6985577
Pages (from-to)507-511
Number of pages5
JournalIEEE Transactions on Electron Devices
Issue number2
StatePublished - 1 Feb 2015


  • Back-gate
  • Dynamic RON
  • High-electron mobility transistor (HEMT)
  • P-GaN


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