An Innovative 1T1R Dipole Dynamic Random Access Memory (DiRAM) featuring high speed, ultra-low power, and low voltage operation

E. R. Hsieh, C. H. Chuang, Steve S. Chung

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

For the first time, a new 1T1R of volatile memory based on the interfacial dipole flipping mechanism, named as Dipole Dynamic Random Access Memory (DiRAM), has been reported. It features 4ns per bit of dipole switching time, larger than 109 of endurance, and 10 seconds of retention with reasonable positive and negative resistance window, low operation voltages with bit line at 0.8V and word line at 0.2V, and around 1 nano-Watt per bit of operation power. DiRAM is also easy to be integrated with state-of-The-Art CMOS technology. The results have shown that this volatile memory may be a potential candidate for the next generation DRAM technology.

Original languageEnglish
Title of host publication2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781467394789
DOIs
StatePublished - 27 May 2016
EventInternational Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016 - Hsinchu, Taiwan
Duration: 25 Apr 201627 Apr 2016

Publication series

Name2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016

Conference

ConferenceInternational Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016
Country/TerritoryTaiwan
CityHsinchu
Period25/04/1627/04/16

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