An efficient transparent test scheme for embedded word-oriented memories

Jin Fu Li, Tsu Wei Tseng, Chin Long Wey

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

Memory cores are usually the densest portion with the smallest feature size in system-on-chip (SOC) designs. The reliability of memory cores thus has heavy impact on the reliability of SOCs. Transparent test is one of useful technique for improving the reliability of memories during life time. This paper presents a systematic algorithm used for transforming a bit-oriented march test into a transparent word-oriented march test. The transformed transparent march test has shorter test complexity compared with that proposed in the previous works [12, 13]. For example, if a memory with 32-bit words is tested with March C-, time complexity of the transparent word-oriented test transformed by the proposed scheme is only about 56% or 19% time complexity of the transparent word-oriented test converted by the scheme reported in [12] or [13], respectively.

Original languageEnglish
Title of host publicationProceedings - Design, Automation and Test in Europe, DATE '05
Pages574-579
Number of pages6
DOIs
StatePublished - 2005
EventDesign, Automation and Test in Europe, DATE '05 - Munich, Germany
Duration: 7 Mar 200511 Mar 2005

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE '05
VolumeI
ISSN (Print)1530-1591

Conference

ConferenceDesign, Automation and Test in Europe, DATE '05
Country/TerritoryGermany
CityMunich
Period7/03/0511/03/05

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