TY - JOUR
T1 - An ARM-based system-on-a-programmable-chip architecture for spoken language translation
AU - Lin, Shun Chieh
AU - Wang, Jia Ching
PY - 2007/9
Y1 - 2007/9
N2 - Previous research shows that there are two architectures for spoken language translation (SLT) system implementation. One is client-server based systems that should be built on the server computer but unreliability of the remote connection. The other is to build portable stand-alone devices but it lacks real-time performance. In this brief, a system-on-a-programmable-chip (SoPC) solution is proposed by realizing the entire SLT system within a single chip. This SoPC is characterized by small size, low cost, real-time operation, and high portability. This entire design was implemented on ALTERA EPXA10 device. Performance for English-to-Mandarin translation process can be completed within 1 s at a 46.22-MHz clock frequency with 3000 translation patterns. The total logic usage of the EPXA10 device is 50% (about 19318 logic cells).
AB - Previous research shows that there are two architectures for spoken language translation (SLT) system implementation. One is client-server based systems that should be built on the server computer but unreliability of the remote connection. The other is to build portable stand-alone devices but it lacks real-time performance. In this brief, a system-on-a-programmable-chip (SoPC) solution is proposed by realizing the entire SLT system within a single chip. This SoPC is characterized by small size, low cost, real-time operation, and high portability. This entire design was implemented on ALTERA EPXA10 device. Performance for English-to-Mandarin translation process can be completed within 1 s at a 46.22-MHz clock frequency with 3000 translation patterns. The total logic usage of the EPXA10 device is 50% (about 19318 logic cells).
KW - ARM
KW - language translation
KW - speech processing speech recognition
KW - system-on-a-programmable-chip (SoPC)
UR - http://www.scopus.com/inward/record.url?scp=34648820251&partnerID=8YFLogxK
U2 - 10.1109/TCSII.2007.899775
DO - 10.1109/TCSII.2007.899775
M3 - 期刊論文
AN - SCOPUS:34648820251
SN - 1549-7747
VL - 54
SP - 765
EP - 769
JO - IEEE Transactions on Circuits and Systems II: Express Briefs
JF - IEEE Transactions on Circuits and Systems II: Express Briefs
IS - 9
ER -