An Aging Detection and Tolerance Framework for 8T SRAM Dot Product CIM Engine

Yu Guang Chen; Chi Hsu Wang; Ing Chao Lin

doi:10.1109/ISOCC56007.2022.10031538

An Aging Detection and Tolerance Framework for 8T SRAM Dot Product CIM Engine

Yu Guang Chen, Chi Hsu Wang, Ing Chao Lin

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Computing In-Memory (CIM), which directly performs in-situ operations at memory, is one of the promising solutions to overcome von Neumann bottleneck. Previous researchers have proposed an 8T-SRAM-based CIM structure to perform dot product (DP) computations by analog charging/discharging operations. However, CIM structure may suffer from variations and aging effects such as BTI and HCI, which threat the reliability of CIM operation results. In this paper, we propose an agingaware CIM operation framework which consists of an aging detection method and an aging tolerance technique. Specifically, we apply Dynamic Voltage Scaling (DVS) on affected CIM structure to compensate the current drop due to variations and aging effects. Experimental results show that our method can successfully calibrate dropped current and thus maintain the reliability of CIM operations.

Original language	English
Title of host publication	Proceedings - International SoC Design Conference 2022, ISOCC 2022
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	161-162
Number of pages	2
ISBN (Electronic)	9781665459716
DOIs	https://doi.org/10.1109/ISOCC56007.2022.10031538
State	Published - 2022
Event	19th International System-on-Chip Design Conference, ISOCC 2022 - Gangneung-si, Korea, Republic of Duration: 19 Oct 2022 → 22 Oct 2022

Publication series

Name	Proceedings - International SoC Design Conference 2022, ISOCC 2022

Conference

Conference	19th International System-on-Chip Design Conference, ISOCC 2022
Country/Territory	Korea, Republic of
City	Gangneung-si
Period	19/10/22 → 22/10/22

Keywords

8T SRAM
Aging
Computing In-Memory
DVS

Access to Document

10.1109/ISOCC56007.2022.10031538

Cite this

Chen, Y. G., Wang, C. H., & Lin, I. C. (2022). An Aging Detection and Tolerance Framework for 8T SRAM Dot Product CIM Engine. In Proceedings - International SoC Design Conference 2022, ISOCC 2022 (pp. 161-162). (Proceedings - International SoC Design Conference 2022, ISOCC 2022). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISOCC56007.2022.10031538

@inproceedings{8aa78f3dc4924b0bb8faf13360b37b24,

title = "An Aging Detection and Tolerance Framework for 8T SRAM Dot Product CIM Engine",

abstract = "Computing In-Memory (CIM), which directly performs in-situ operations at memory, is one of the promising solutions to overcome von Neumann bottleneck. Previous researchers have proposed an 8T-SRAM-based CIM structure to perform dot product (DP) computations by analog charging/discharging operations. However, CIM structure may suffer from variations and aging effects such as BTI and HCI, which threat the reliability of CIM operation results. In this paper, we propose an agingaware CIM operation framework which consists of an aging detection method and an aging tolerance technique. Specifically, we apply Dynamic Voltage Scaling (DVS) on affected CIM structure to compensate the current drop due to variations and aging effects. Experimental results show that our method can successfully calibrate dropped current and thus maintain the reliability of CIM operations.",

keywords = "8T SRAM, Aging, Computing In-Memory, DVS",

author = "Chen, {Yu Guang} and Wang, {Chi Hsu} and Lin, {Ing Chao}",

note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 19th International System-on-Chip Design Conference, ISOCC 2022 ; Conference date: 19-10-2022 Through 22-10-2022",

year = "2022",

doi = "10.1109/ISOCC56007.2022.10031538",

language = "???core.languages.en_GB???",

series = "Proceedings - International SoC Design Conference 2022, ISOCC 2022",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "161--162",

booktitle = "Proceedings - International SoC Design Conference 2022, ISOCC 2022",

}

Chen, YG, Wang, CH & Lin, IC 2022, An Aging Detection and Tolerance Framework for 8T SRAM Dot Product CIM Engine. in Proceedings - International SoC Design Conference 2022, ISOCC 2022. Proceedings - International SoC Design Conference 2022, ISOCC 2022, Institute of Electrical and Electronics Engineers Inc., pp. 161-162, 19th International System-on-Chip Design Conference, ISOCC 2022, Gangneung-si, Korea, Republic of, 19/10/22. https://doi.org/10.1109/ISOCC56007.2022.10031538

An Aging Detection and Tolerance Framework for 8T SRAM Dot Product CIM Engine. / Chen, Yu Guang; Wang, Chi Hsu; Lin, Ing Chao.
Proceedings - International SoC Design Conference 2022, ISOCC 2022. Institute of Electrical and Electronics Engineers Inc., 2022. p. 161-162 (Proceedings - International SoC Design Conference 2022, ISOCC 2022).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - An Aging Detection and Tolerance Framework for 8T SRAM Dot Product CIM Engine

AU - Chen, Yu Guang

AU - Wang, Chi Hsu

AU - Lin, Ing Chao

PY - 2022

Y1 - 2022

N2 - Computing In-Memory (CIM), which directly performs in-situ operations at memory, is one of the promising solutions to overcome von Neumann bottleneck. Previous researchers have proposed an 8T-SRAM-based CIM structure to perform dot product (DP) computations by analog charging/discharging operations. However, CIM structure may suffer from variations and aging effects such as BTI and HCI, which threat the reliability of CIM operation results. In this paper, we propose an agingaware CIM operation framework which consists of an aging detection method and an aging tolerance technique. Specifically, we apply Dynamic Voltage Scaling (DVS) on affected CIM structure to compensate the current drop due to variations and aging effects. Experimental results show that our method can successfully calibrate dropped current and thus maintain the reliability of CIM operations.

AB - Computing In-Memory (CIM), which directly performs in-situ operations at memory, is one of the promising solutions to overcome von Neumann bottleneck. Previous researchers have proposed an 8T-SRAM-based CIM structure to perform dot product (DP) computations by analog charging/discharging operations. However, CIM structure may suffer from variations and aging effects such as BTI and HCI, which threat the reliability of CIM operation results. In this paper, we propose an agingaware CIM operation framework which consists of an aging detection method and an aging tolerance technique. Specifically, we apply Dynamic Voltage Scaling (DVS) on affected CIM structure to compensate the current drop due to variations and aging effects. Experimental results show that our method can successfully calibrate dropped current and thus maintain the reliability of CIM operations.

KW - 8T SRAM

KW - Aging

KW - Computing In-Memory

KW - DVS

UR - http://www.scopus.com/inward/record.url?scp=85148450193&partnerID=8YFLogxK

U2 - 10.1109/ISOCC56007.2022.10031538

DO - 10.1109/ISOCC56007.2022.10031538

M3 - 會議論文篇章

AN - SCOPUS:85148450193

T3 - Proceedings - International SoC Design Conference 2022, ISOCC 2022

SP - 161

EP - 162

BT - Proceedings - International SoC Design Conference 2022, ISOCC 2022

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 19th International System-on-Chip Design Conference, ISOCC 2022

Y2 - 19 October 2022 through 22 October 2022

ER -

An Aging Detection and Tolerance Framework for 8T SRAM Dot Product CIM Engine

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