An adaptive low-power control scheme for on-chip network applications

Chun Lung Hsu, Chang Hsin Cheng, Yu Sheng Huang, Chih Jung Chen

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Systems-on-chip (SoC) is evolving toward complex heterogeneous multiprocessors made of many pre-designed cores or IPs with application specific interconnections. Intra-chip interconnects are thus becoming one of the central elements of SoC design and pose conflicting goals in terms of low energy per transmitted bit, guaranteed signal integrity, and ease of design. This paper presents a low-power control policy for on-chip network applications. The proposed scheme uses the dynamic voltage scaling (DVS) approach to deal with low swing signaling and error detection codes for error rate detecting. Simulation results show that the proposed scheme can effectively save the energy consumption with different data links in an on-chip network.

Original languageEnglish
Title of host publicationAPCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems
Pages113-118
Number of pages6
DOIs
StatePublished - 2006
EventAPCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems - , Singapore
Duration: 4 Dec 20066 Dec 2006

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Conference

ConferenceAPCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems
Country/TerritorySingapore
Period4/12/066/12/06

Keywords

  • DVS
  • Low power
  • On-chip network
  • SOC

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