Al-V 10-bit 2GSample/s D/A converter based on precision current reference in 90-nm CMOS

Kuo Hsing Cheng; Hsin Hao Wang; Ding Jyun Huang

doi:10.1109/ICECS.2008.4674860

Al-V 10-bit 2GSample/s D/A converter based on precision current reference in 90-nm CMOS

Kuo Hsing Cheng, Hsin Hao Wang, Ding Jyun Huang

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Scopus citations

Abstract

This paper describes a 2GS/s 10bit DAC with a supply voltage lower to 1 volt. It has been realized in a 90-nm 1P9M CMOS technology. A novel high precision active cascode mirror circuit is presented. Provided the headroom is not affected, operating the current source in the triode region, the precision of the current source array can be obtained. In addition, the demand of low analog/digital supply voltage and the influence of MOS short-channel effect can be overcome. The INL is between +0.12 and -0.14 LSB, and the DNL is between +0.23 and -0.35 LSB. When the DAC operates at an input signal frequency of 10MHz, a SFDR of 65.1dB can be achieved. Moreover, a SFDR of 54.4dB can be gained when the DAC operates at 982.2MHz. The power consumption of the proposed design is approximately 79mW. The chip area is about 1mm × 1mm.

Original language	English
Title of host publication	Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008
Pages	340-343
Number of pages	4
DOIs	https://doi.org/10.1109/ICECS.2008.4674860
State	Published - 2008
Event	15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008 - St. Julian's, Malta Duration: 31 Aug 2008 → 3 Sep 2008

Publication series

Name	Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008

Conference

Conference	15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008
Country/Territory	Malta
City	St. Julian's
Period	31/08/08 → 3/09/08

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10.1109/ICECS.2008.4674860

Cite this

Cheng, K. H., Wang, H. H., & Huang, D. J. (2008). Al-V 10-bit 2GSample/s D/A converter based on precision current reference in 90-nm CMOS. In Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008 (pp. 340-343). Article 4674860 (Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008). https://doi.org/10.1109/ICECS.2008.4674860

Cheng, Kuo Hsing ; Wang, Hsin Hao ; Huang, Ding Jyun. / Al-V 10-bit 2GSample/s D/A converter based on precision current reference in 90-nm CMOS. Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008. 2008. pp. 340-343 (Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008).

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title = "Al-V 10-bit 2GSample/s D/A converter based on precision current reference in 90-nm CMOS",

abstract = "This paper describes a 2GS/s 10bit DAC with a supply voltage lower to 1 volt. It has been realized in a 90-nm 1P9M CMOS technology. A novel high precision active cascode mirror circuit is presented. Provided the headroom is not affected, operating the current source in the triode region, the precision of the current source array can be obtained. In addition, the demand of low analog/digital supply voltage and the influence of MOS short-channel effect can be overcome. The INL is between +0.12 and -0.14 LSB, and the DNL is between +0.23 and -0.35 LSB. When the DAC operates at an input signal frequency of 10MHz, a SFDR of 65.1dB can be achieved. Moreover, a SFDR of 54.4dB can be gained when the DAC operates at 982.2MHz. The power consumption of the proposed design is approximately 79mW. The chip area is about 1mm × 1mm.",

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Cheng, KH, Wang, HH & Huang, DJ 2008, Al-V 10-bit 2GSample/s D/A converter based on precision current reference in 90-nm CMOS. in Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008., 4674860, Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, pp. 340-343, 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, St. Julian's, Malta, 31/08/08. https://doi.org/10.1109/ICECS.2008.4674860

Al-V 10-bit 2GSample/s D/A converter based on precision current reference in 90-nm CMOS. / Cheng, Kuo Hsing; Wang, Hsin Hao; Huang, Ding Jyun.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008. 2008. p. 340-343 4674860 (Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - This paper describes a 2GS/s 10bit DAC with a supply voltage lower to 1 volt. It has been realized in a 90-nm 1P9M CMOS technology. A novel high precision active cascode mirror circuit is presented. Provided the headroom is not affected, operating the current source in the triode region, the precision of the current source array can be obtained. In addition, the demand of low analog/digital supply voltage and the influence of MOS short-channel effect can be overcome. The INL is between +0.12 and -0.14 LSB, and the DNL is between +0.23 and -0.35 LSB. When the DAC operates at an input signal frequency of 10MHz, a SFDR of 65.1dB can be achieved. Moreover, a SFDR of 54.4dB can be gained when the DAC operates at 982.2MHz. The power consumption of the proposed design is approximately 79mW. The chip area is about 1mm × 1mm.

AB - This paper describes a 2GS/s 10bit DAC with a supply voltage lower to 1 volt. It has been realized in a 90-nm 1P9M CMOS technology. A novel high precision active cascode mirror circuit is presented. Provided the headroom is not affected, operating the current source in the triode region, the precision of the current source array can be obtained. In addition, the demand of low analog/digital supply voltage and the influence of MOS short-channel effect can be overcome. The INL is between +0.12 and -0.14 LSB, and the DNL is between +0.23 and -0.35 LSB. When the DAC operates at an input signal frequency of 10MHz, a SFDR of 65.1dB can be achieved. Moreover, a SFDR of 54.4dB can be gained when the DAC operates at 982.2MHz. The power consumption of the proposed design is approximately 79mW. The chip area is about 1mm × 1mm.

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Cheng KH, Wang HH, Huang DJ. Al-V 10-bit 2GSample/s D/A converter based on precision current reference in 90-nm CMOS. In Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008. 2008. p. 340-343. 4674860. (Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008). doi: 10.1109/ICECS.2008.4674860

Al-V 10-bit 2GSample/s D/A converter based on precision current reference in 90-nm CMOS

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