A wide supply voltage range and low-power all-digital clock generator

Kuo Hsing Cheng, Jen Chieh Liu, Hong Yi Huang, Yu Tso Chen

Research output: Contribution to journalArticlepeer-review

2 Scopus citations

Abstract

This study presents a low-power all-digital clock generator (ADCG) for a wide supply voltage range system. The proposed ADCG limits the maximum supply current to 100 lA at a supply voltage ranging from 1.6 to 3.6 V. The ADCG also uses a digitally controlled oscillator (DCO) to extend its operational frequency range. The proposed DCO controls the supply current and divider circuits for a wide supply voltage range. The output duty cycle of ADCG falls within 50 ± 1.9 % using a duty cycle corrector. The maximum peak-to-peak jitter is less than 2.7 % at 8.38 MHz for a digital water meter application (DWM). The operational frequencies of 1.45 and 8.38 MHz at 1.8 V are 3.1 and 36.7 μA, respectively. The core area of ADCG is 0.14 mm2 for a 0.35 μ.m CMOS process. The operational frequency of ADCG ranges from 4.5 to 9.2 MHz at a supply voltage ranging from 1.6 to 3.6 V. This clock generator can also be applied to microcontroller applications.

Original languageEnglish
Pages (from-to)517-526
Number of pages10
JournalAnalog Integrated Circuits and Signal Processing
Volume74
Issue number3
DOIs
StatePublished - Mar 2013

Keywords

  • All-digital clock generator (ADCG)
  • Digitally controlled oscillator (DCO)
  • Duty cycle corrector (DCC)
  • Low power
  • Wide supply voltage range

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