A VLSI architecture of 2-D discrete wavelet transform for reducing computation time

In this paper, we propose an efficient VLSI architecture for implementing the forward two-dimensional discrete wavelet transform (2D DWT), which is computed without utilizing the traditional method of rows-by-columns or columns-by-rows. On account of the relation form within the original data, we apply masks of different window sizes to the transform and design the architecture based on these different window masks. On the comparison of the computing time, the proposed architecture requires only N*N/4 clock cycles for an N*N image, while it takes N*N clock cycles for the traditional row-by-column/column-by-row 2D DWT. The proposed architecture has a better performance than other designs reported in the literature.