TY - GEN
T1 - A Self-align Gate-last Resistive Gate Switching FinFET Nonvolatile Memory Feasible for Embedded Applications
AU - Yang, W. Y.
AU - Hsieh, E. R.
AU - Cheng, C. H.
AU - Chung, Steve S.
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2020/6
Y1 - 2020/6
N2 - In this work, we propose a FinFET resistance gate switching nonvolatile memory (RG-FinFET) which comprises a simple RRAM structure on top of a HKMG FinFET gate. The readout is taken from the FinFET VT or ID and its operation is based on the resistance switching instead of the conventional charge storage. The SET/RESET operation of the memory is made by the edge tunneling between top gate and source. The RG-FinFET shows ultra-low switching current, FORMing-free and ultra-fast SET/RESET speed. Comparing to conventional drain-type 1T1R, proposed gate-type 1T features low power consumption, smaller size in layout and larger window. It also exhibits excellent reliabilities, e.g., a very large window with highly stable retention, no sneak path, immunity to disturbances etc. Moreover, RG-FinFET is fully compatible with the logic CMOS technology and well-suited for NOR type memories, showing great potential for the future embedded applications.
AB - In this work, we propose a FinFET resistance gate switching nonvolatile memory (RG-FinFET) which comprises a simple RRAM structure on top of a HKMG FinFET gate. The readout is taken from the FinFET VT or ID and its operation is based on the resistance switching instead of the conventional charge storage. The SET/RESET operation of the memory is made by the edge tunneling between top gate and source. The RG-FinFET shows ultra-low switching current, FORMing-free and ultra-fast SET/RESET speed. Comparing to conventional drain-type 1T1R, proposed gate-type 1T features low power consumption, smaller size in layout and larger window. It also exhibits excellent reliabilities, e.g., a very large window with highly stable retention, no sneak path, immunity to disturbances etc. Moreover, RG-FinFET is fully compatible with the logic CMOS technology and well-suited for NOR type memories, showing great potential for the future embedded applications.
UR - http://www.scopus.com/inward/record.url?scp=85092206935&partnerID=8YFLogxK
U2 - 10.1109/SNW50361.2020.9131669
DO - 10.1109/SNW50361.2020.9131669
M3 - 會議論文篇章
AN - SCOPUS:85092206935
T3 - 2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020
SP - 23
EP - 24
BT - 2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020
Y2 - 13 June 2020 through 14 June 2020
ER -