A Reconfigurable Accelerator Design for Quantized Depthwise Separable Convolutions

Yu Guang Chen, Hung Yi Chiang, Chi Wei Hsu, Tsung Han Hsieh, Jing Yang Jou

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Convolutional Neural Networks (CNNs) are widely applied in various computer version applications such as object recognition and image classification. With large amount of Multiply Accumulate Operations (MACs) in CNN computations, it is a trend to process the data locally at edge devices to avoid significant data movement. MobileNets were proposed as a light-weight neural network for mobile and embedded devices by using depthwise separable convolutions. Moreover, to further reduce commutation efforts, quantization can be appropriately applied to MobileNets without significant accuracy loss. To provide an efficient computation platform for quantized MobileNets, in this paper we propose a novel performance-Aware reconfigurable accelerator design which prefect fit the depthwise separable convolutions. Experimental results show that we can achieve 16% area reduction and 1.07x speedup compared to previous MobileNets accelerator design.

Original languageEnglish
Title of host publicationProceedings - International SoC Design Conference 2021, ISOCC 2021
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages290-291
Number of pages2
ISBN (Electronic)9781665401746
DOIs
StatePublished - 2021
Event18th International System-on-Chip Design Conference, ISOCC 2021 - Jeju Island, Korea, Republic of
Duration: 6 Oct 20219 Oct 2021

Publication series

NameProceedings - International SoC Design Conference 2021, ISOCC 2021

Conference

Conference18th International System-on-Chip Design Conference, ISOCC 2021
Country/TerritoryKorea, Republic of
CityJeju Island
Period6/10/219/10/21

Keywords

  • AI accelerator
  • Mobilenets
  • Reconfigurable Structure

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