@article{44622f1be147468b819469644833237b,
title = "A Pseudomorphic GaInP/InP MESFET with Improved Device Performance",
abstract = "A high bandgap GaInP epitaxial material was grown on InP to increase the Schottky barrier height of the InP MESFET. The Schottky gate materials used in this study were Au and Pt2Si. The pseudomorphic GaInP/InP MESFET with Au gate has a Schottky barrier height of 0.54 eV and the reverse leakage current of the device is 10 -2 times lower than the conventional InP MESFET. The extrinsic and intrinsic transconductance of the pseudomorphic MESFET were 66.7 and 104.2 mS/mm respectively for the 5 μm gate length GaInP/InP MESFET.",
author = "Lin, {K. C.} and Hsin, {Y. M.} and Chang, {C. Y.}",
note = "Funding Information: There are four major steps in the MESFET process: epitaxy growth, isolation, ohmic contact, and Schottky contact. The critical thickness for GaInP material on InP with 18% Ga content is 150 A [2]. In this work, we grew 150 A GaInP material with 10% Ga content on InP. All the epitaxy layers in this work were grown by LP-MOCVD on S.I. InP substrates using triethylgallium (TEGa), trimethylindium (TMIn) and PH3 as Ga, In and P sources respectively. After finishing the initial clean of the S.I. InP wafer, the wafer was put into the resistor heated horizontal reactor. The growth temperature was 665°C for all layers. The dopant concentration of the InP butfer layer (3000 A) and InP active layer (1000 A) were about 10l6 and 2 X 10{\textquoteright}{\textquoteright} cm-{\textquoteright}, respectively. A conventional InP MESFET was also grown on S.I. InP wafer for comparison. The growth of the pseudomorphic GaInF/InP MESFET starts with an undoped InP buffer layer of 3000 A, then an n-type InP active layer of 1000 A, and stops at the undoped Gao ,Ino 9P strained layer. The existence of the GaInP layer is analyzed by Manuscript received June 8, 1993; revised July 16, 1993. This work was supported in part by the National Science Council under Contracts NSC-81-0417-E009-12. The review of this brief was arranged by S. Furukawa. K. C. Lin, Y. M. Hsin, and C. Y. Chang are with the Institute of Electronics, National Chiao-Tung University, Hsin-Chu, Taiwan, R.O.C. E. Y. Chang is with the Institute of Materials Science and Engineering, National Chiao-Tung University, Hsin-Chu, Taiwan, R.O.C. IEEE Log Number 9212637.",
year = "1993",
month = dec,
doi = "10.1109/16.249488",
language = "???core.languages.en_GB???",
volume = "40",
pages = "2361--2362",
journal = "IEEE Transactions on Electron Devices",
issn = "0018-9383",
number = "12",
}