A programmable application-specific VLSI architecture for speech recognition

Keyphrases

• VLSI Architecture 100%
• Speech Recognition 100%
• Computation Time 50%
• Speech Recognition System 50%
• Computation Complexity 50%
• Computation-intensive 50%
• Design Complexity 50%
• Memory Size 50%
• Performance-based Design 50%
• Speech Recognizer 50%
• Recognition Algorithm 50%
• Algorithm Improvement 50%
• Bayesian Neural Network 50%
• Standalone Applications 50%
• Computational Tasks 50%
• Design Flexibility 50%
• Network Operation 50%
• Specific Recognition 50%
• Application Architecture 50%
• Programmable Architecture 50%
• Mel-frequency Cepstrum 50%

Computer Science

• Very large-scale integration (VLSI) architecture 100%
• Speech Recognition 100%
• Computation Time 50%
• Neural Network 50%
• Speech Recognition System 50%
• Computation Complexity 50%
• Intensive Operation 50%
• Speech Recognizer 50%
• Recognition Algorithm 50%
• Design Complexity 50%
• Consuming Computation 50%
• Network Operation 50%