A new method for constructing IP level power model based on power sensitivity

Heng Liang Huang, Jiing Yuan Lin, Wen Zen Shen, Jing Yang Jou

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

This paper proposes a nominal point selection method for IP (Intellectual Property) level power model based on power sensitivity. By analyzing the relationship between the dynamic power consumption of CMOS circuits and their input signal statistics, three nominal points are efficiently selected to construct a power model based on power sensitivity. Our experimental results on a number of benchmark circuits show the effectiveness of the proposed method. Estimation accuracy within 5.78% of transistor level simulations is achieved.

Original languageEnglish
Title of host publicationProceedings of the 2000 Asia and South Pacific Design Automation Conference, ASP-DAC 2000
Pages135-139
Number of pages5
DOIs
StatePublished - 2000
Event2000 Asia and South Pacific Design Automation Conference, ASP-DAC 2000 - Yokohama, Japan
Duration: 25 Jan 200028 Jan 2000

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Conference

Conference2000 Asia and South Pacific Design Automation Conference, ASP-DAC 2000
Country/TerritoryJapan
CityYokohama
Period25/01/0028/01/00

Fingerprint

Dive into the research topics of 'A new method for constructing IP level power model based on power sensitivity'. Together they form a unique fingerprint.

Cite this