A memory-reduced Log-MAP kernel for turbo decoder

Tsung Han Tsai, Cheng Hung Lin, An Yeu Wu

Research output: Contribution to journalConference articlepeer-review

8 Scopus citations

Abstract

Generally, the Log-MAP kernel of the turbo decoding consume large memories in hardware implementtation. In this paper, we propose a new Log-MAP kernel to reduce memory usage. The comparison result shows our proposed architecture can reduce the memory size to 26% of the classical architecture. We also simplify the memory data access in this kernel design without extra address generaters. For 3GPP standard, a prototyping chip of the turbo decoder is implemented to verify the proposed memory-reduced Log- MAP kernel in 3.04×3.04mm2 core area in UMC 0.18um CMOS process.

Original languageEnglish
Article number1464767
Pages (from-to)1032-1035
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
DOIs
StatePublished - 2005
EventIEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 - Kobe, Japan
Duration: 23 May 200526 May 2005

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