A low-power high driving ability voltage control oscillator used in PLL

Kuo Hsing Cheng, Wei Bin Yang, Chun Fu Chung

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Modern high speed CMOS processors using on-chip phase-locked-loops often require a clock buffer with stringent specifications on the signal's rise time and fall time rather than on the buffer's delay time. For these applications we propose a novel voltage controlled oscillator (VCO) with split path CMOS driver. It can be proposed to reduce the total power consumption and phase errors of the PLL. The proposed VCO with the split-path CMOS driver has low power consumption and lower area requirement than that achievable by the traditional tapered CMOS buffer.

Original languageEnglish
Title of host publicationISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Pages614-617
Number of pages4
DOIs
StatePublished - 2001
Event2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001 - Sydney, NSW, Australia
Duration: 6 May 20019 May 2001

Publication series

NameISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Volume4

Conference

Conference2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001
Country/TerritoryAustralia
CitySydney, NSW
Period6/05/019/05/01

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