A low-power high driving ability voltage control oscillator used in PLL

K. H. Cheng, W. B. Yang, C. F. Chung

Research output: Contribution to journalConference articlepeer-review

Abstract

Modern high speed CMOS processors using on-chip phase-locked-loops often require a clock buffer with stringent specifications on the signal's rise time and fall time rather than on the buffer's delay time. For these applications we propose a novel voltage controlled oscillator (VCO) with split path CMOS driver. It can be proposed to reduce the total power consumption and phase errors of the PLL. The proposed VCO with the split-path CMOS driver has low power consumption and lower area requirement than that achievable by the traditional tapered CMOS buffer.

Original languageEnglish
Pages (from-to)IV614-IV617
JournalMaterials Research Society Symposium - Proceedings
Volume626
StatePublished - 2001
EventThermoelectric Materials 2000-The Next Generation Materials for Small-Scale Refrigeration and Power Generation Applications - San Francisco, CA, United States
Duration: 24 Apr 200027 Apr 2000

Fingerprint

Dive into the research topics of 'A low-power high driving ability voltage control oscillator used in PLL'. Together they form a unique fingerprint.

Cite this