Projects per year
Abstract
Electric vehicle systems and smart grid systems are setting stringent development targets to respond to global trends in energy saving, carbon reduction, and sustainable environmental development. In the field of batteries, there has been extensive discussion on the estimation of battery charge. In battery management systems (BMSs) and charging/discharging systems, the accuracy of the measurement of battery physical parameters is critical, as it directly affects the system, alongside the algorithm’s estimation and error correction. Therefore, this paper proposes incorporating a low-power continuous-time delta-sigma analogue-to-digital converter into a battery measurement system to support deep learning algorithms for battery state estimation. This approach aims to maintain the accuracy of battery state estimation while reducing latency and overall system power consumption. Implemented using the UMC 0.18 μm CMOS 1P6M process, the proposed design achieves a measured signal-to-noise distortion ratio (SNDR) of 78.42 dB, an effective number of bits (ENOB) of 12.73 bits, and a power consumption of approximately 15.97 μW. The chip layout area is 0.67 mm × 0.56 mm. By applying delta-sigma modulators to energy management systems, this solution aims to increase the total number of battery monitoring units while reducing overall power consumption and construction costs.
| Original language | English |
|---|---|
| Article number | 3459 |
| Journal | Electronics (Switzerland) |
| Volume | 13 |
| Issue number | 17 |
| DOIs | |
| State | Published - Sep 2024 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
Keywords
- BGR
- BMS
- SOC
- current reuse
- deep learning
- low-power ΔΣ ADC
- neural network
Fingerprint
Dive into the research topics of 'A Low-Power Continuous-Time Delta-Sigma Analogue-to-Digital Converter for the Neural Network Architecture of Battery State Estimation'. Together they form a unique fingerprint.Projects
- 2 Finished
-
Chip Design and Implementation of High Enerigy-Efficiency Reconfigurable Neuromorphic Computing for Deep Learning Appications
Shiue, M.-T. (PI)
1/08/20 → 30/09/21
Project: Research
-
Develop Deep Learning Techniques for Next Generation beyond Gigabit Ethernet Transceiver( I )
Shiue, M.-T. (PI)
1/01/20 → 31/12/20
Project: Research
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