A low droop rate wide input bandwidth high dynamic range track-and-hold amplifier in 0.18 urn SiGe process

Guan Lin Huang, Cheng Rui Li, Han Sen Yang, Hong Yeh Chang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A low droop rate wide input bandwidth high dynamic range track-and-hold amplifier is proposed using 0.18 um SiGe process in this paper. A master-slave track-and-hold topology is employed in the circuit design to further enhance the hold-mode isolation, and the measured droop rate is lower than 6 uV/ps. A distributed amplifier is adopted for the input buffers and the clock buffers to widen the input bandwidth and sampling speed. Moreover, a differential feedthrough cancellation technique is employed in the track-and-hold stage to enhance isolation and linearity. With a total dc power consumption of 134 mW, the proposed THA features an input bandwidth of 10 GHz and an isolation of more than 50 dB. The measured spurious free dynamic range is 39.2 dB when the sampling rate is 7 GS/s.

Original languageEnglish
Title of host publication2018 Asia-Pacific Microwave Conference, APMC 2018 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1510-1512
Number of pages3
ISBN (Electronic)9784902339451
DOIs
StatePublished - 16 Jan 2019
Event30th Asia-Pacific Microwave Conference, APMC 2018 - Kyoto, Japan
Duration: 6 Nov 20189 Nov 2018

Publication series

NameAsia-Pacific Microwave Conference Proceedings, APMC
Volume2018-November

Conference

Conference30th Asia-Pacific Microwave Conference, APMC 2018
Country/TerritoryJapan
CityKyoto
Period6/11/189/11/18

Keywords

  • High-speed analog CMOS design
  • RF and mixed signal IC design
  • RF front ends sampling circuits
  • SiGe

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