A K-band linearized amplifier with a modified third-order transconductance cancellation technique in 0.18 μm CMOS process

Yen Liang Yeh, Ruei Yun Hung, Hong Yeh Chang, Kevin Chen, Szu Hsien Wu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

A modified third-order transconductance (g m3) cancellation technique is employed to improve the linearity of a MOSFET amplifier. The method is based on the main transistor (MT) in parallel with the auxiliary transistors (ATs). The magnitude of the ATs' equivalent g m3 is close to the MT with out of phase. The third-order intermodulation (IM3) of the transistor cell can be suppressed. The linearized amplifier is fabricated in 0.18 μm CMOS process. The amplifier demonstrates a small signal gain of 10 dB, an input 1-dB compression point (P 1dB) of -7 dBm, an input third-order-intercept point (IIP3) of 2.3 dBm, and an IIP3 improvement of 6.5 dB without extra dc power consumption. The dc power consumption of the proposed linearized amplifier is 23.4 mW with a dc supply voltage of 1.8 V.

Original languageEnglish
Title of host publicationAsia-Pacific Microwave Conference Proceedings, APMC 2011
Pages363-366
Number of pages4
StatePublished - 2011
EventAsia-Pacific Microwave Conference, APMC 2011 - Melbourne, VIC, Australia
Duration: 5 Dec 20118 Dec 2011

Publication series

NameAsia-Pacific Microwave Conference Proceedings, APMC

Conference

ConferenceAsia-Pacific Microwave Conference, APMC 2011
Country/TerritoryAustralia
CityMelbourne, VIC
Period5/12/118/12/11

Keywords

  • CMOS
  • linearization
  • third-order intermodulation (IM3)
  • third-order transconductance (g )

Fingerprint

Dive into the research topics of 'A K-band linearized amplifier with a modified third-order transconductance cancellation technique in 0.18 μm CMOS process'. Together they form a unique fingerprint.

Cite this