A Hybrid Implant Doping Technique with Plasma Immersion Ion Implant (PIII) Process for 10 nm Fin Cannel of 3D-FET

Yi Ju Chen; Ying Tsan Tang; Chang Hsien Lin; Chun Chi Chen; Julian Duchaine; Yohann Spiegel; Frank Torregrossa; Laurent Roux; Jason Chen; Yun Jie Wei; Yao Ming Huang; Min Chuan Hsiao; Yen Chang Chen; Kai Shin Li; Yao Jen Lee; Min Cheng Chen; Jia Ming Shieh; Wen Kuan Yeh

doi:10.1109/IIT.2016.7882844

A Hybrid Implant Doping Technique with Plasma Immersion Ion Implant (PIII) Process for 10 nm Fin Cannel of 3D-FET

Yi Ju Chen, Ying Tsan Tang, Chang Hsien Lin, Chun Chi Chen, Julian Duchaine, Yohann Spiegel, Frank Torregrossa, Laurent Roux, Jason Chen, Yun Jie Wei, Yao Ming Huang, Min Chuan Hsiao, Yen Chang Chen, Kai Shin Li, Yao Jen Lee, Min Cheng Chen, Jia Ming Shieh, Wen Kuan Yeh

College of Electrical Engineering and Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

In this work, a sub-10 nm high-κ/metal gate (HKMG) bulk fin-type field effect transistor (FinFET) devices with symmetrical N/PMOS characteristic were fabricated by a new hybrid dopant technology of plasma immersion ion implant (PIII) with traditional ion implant. This method was demonstrated to effectively reduce contact resistance and increase driving current of 18% in FinFET device. A remarkable improvement of sub-threshold swing (24%) and DIBL (36%) were also reported in this work. A low resistance of TiSi silicide process are incorporated in our FinFET platform to achieve a higher I_on/I_off current ratio of 106. The whole device fabrication can be fully integrated in CMOS device.

Original language	English
Title of host publication	2016 21st International Conference on Ion Implantation Technology, IIT 2016
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781509020232
DOIs	https://doi.org/10.1109/IIT.2016.7882844
State	Published - 20 Mar 2017
Event	21st International Conference on Ion Implantation Technology, IIT 2016 - Tainan, Taiwan Duration: 26 Sep 2016 → 30 Sep 2016

Publication series

Name	Proceedings of the International Conference on Ion Implantation Technology

Conference

Conference	21st International Conference on Ion Implantation Technology, IIT 2016
Country/Territory	Taiwan
City	Tainan
Period	26/09/16 → 30/09/16

Keywords

FinFET
Plasma Immersion Ion Implant (PIII)

Access to Document

10.1109/IIT.2016.7882844

Cite this

Chen, Y. J., Tang, Y. T., Lin, C. H., Chen, C. C., Duchaine, J., Spiegel, Y., Torregrossa, F., Roux, L., Chen, J., Wei, Y. J., Huang, Y. M., Hsiao, M. C., Chen, Y. C., Li, K. S., Lee, Y. J., Chen, M. C., Shieh, J. M., & Yeh, W. K. (2017). A Hybrid Implant Doping Technique with Plasma Immersion Ion Implant (PIII) Process for 10 nm Fin Cannel of 3D-FET. In 2016 21st International Conference on Ion Implantation Technology, IIT 2016 [7882844] (Proceedings of the International Conference on Ion Implantation Technology). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IIT.2016.7882844

Chen, Yi Ju ; Tang, Ying Tsan ; Lin, Chang Hsien et al. / A Hybrid Implant Doping Technique with Plasma Immersion Ion Implant (PIII) Process for 10 nm Fin Cannel of 3D-FET. 2016 21st International Conference on Ion Implantation Technology, IIT 2016. Institute of Electrical and Electronics Engineers Inc., 2017. (Proceedings of the International Conference on Ion Implantation Technology).

@inproceedings{5d845e7243214e02b9c7f256af8ede88,

title = "A Hybrid Implant Doping Technique with Plasma Immersion Ion Implant (PIII) Process for 10 nm Fin Cannel of 3D-FET",

abstract = "In this work, a sub-10 nm high-κ/metal gate (HKMG) bulk fin-type field effect transistor (FinFET) devices with symmetrical N/PMOS characteristic were fabricated by a new hybrid dopant technology of plasma immersion ion implant (PIII) with traditional ion implant. This method was demonstrated to effectively reduce contact resistance and increase driving current of 18% in FinFET device. A remarkable improvement of sub-threshold swing (24%) and DIBL (36%) were also reported in this work. A low resistance of TiSi silicide process are incorporated in our FinFET platform to achieve a higher Ion/Ioff current ratio of 106. The whole device fabrication can be fully integrated in CMOS device.",

keywords = "FinFET, Plasma Immersion Ion Implant (PIII)",

author = "Chen, {Yi Ju} and Tang, {Ying Tsan} and Lin, {Chang Hsien} and Chen, {Chun Chi} and Julian Duchaine and Yohann Spiegel and Frank Torregrossa and Laurent Roux and Jason Chen and Wei, {Yun Jie} and Huang, {Yao Ming} and Hsiao, {Min Chuan} and Chen, {Yen Chang} and Li, {Kai Shin} and Lee, {Yao Jen} and Chen, {Min Cheng} and Shieh, {Jia Ming} and Yeh, {Wen Kuan}",

note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 21st International Conference on Ion Implantation Technology, IIT 2016 ; Conference date: 26-09-2016 Through 30-09-2016",

year = "2017",

month = mar,

day = "20",

doi = "10.1109/IIT.2016.7882844",

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series = "Proceedings of the International Conference on Ion Implantation Technology",

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Chen, YJ, Tang, YT, Lin, CH, Chen, CC, Duchaine, J, Spiegel, Y, Torregrossa, F, Roux, L, Chen, J, Wei, YJ, Huang, YM, Hsiao, MC, Chen, YC, Li, KS, Lee, YJ, Chen, MC, Shieh, JM & Yeh, WK 2017, A Hybrid Implant Doping Technique with Plasma Immersion Ion Implant (PIII) Process for 10 nm Fin Cannel of 3D-FET. in 2016 21st International Conference on Ion Implantation Technology, IIT 2016., 7882844, Proceedings of the International Conference on Ion Implantation Technology, Institute of Electrical and Electronics Engineers Inc., 21st International Conference on Ion Implantation Technology, IIT 2016, Tainan, Taiwan, 26/09/16. https://doi.org/10.1109/IIT.2016.7882844

A Hybrid Implant Doping Technique with Plasma Immersion Ion Implant (PIII) Process for 10 nm Fin Cannel of 3D-FET. / Chen, Yi Ju; Tang, Ying Tsan; Lin, Chang Hsien et al.
2016 21st International Conference on Ion Implantation Technology, IIT 2016. Institute of Electrical and Electronics Engineers Inc., 2017. 7882844 (Proceedings of the International Conference on Ion Implantation Technology).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A Hybrid Implant Doping Technique with Plasma Immersion Ion Implant (PIII) Process for 10 nm Fin Cannel of 3D-FET

AU - Chen, Yi Ju

AU - Tang, Ying Tsan

AU - Lin, Chang Hsien

AU - Chen, Chun Chi

AU - Duchaine, Julian

AU - Spiegel, Yohann

AU - Torregrossa, Frank

AU - Roux, Laurent

AU - Chen, Jason

AU - Wei, Yun Jie

AU - Huang, Yao Ming

AU - Hsiao, Min Chuan

AU - Chen, Yen Chang

AU - Li, Kai Shin

AU - Lee, Yao Jen

AU - Chen, Min Cheng

AU - Shieh, Jia Ming

AU - Yeh, Wen Kuan

PY - 2017/3/20

Y1 - 2017/3/20

N2 - In this work, a sub-10 nm high-κ/metal gate (HKMG) bulk fin-type field effect transistor (FinFET) devices with symmetrical N/PMOS characteristic were fabricated by a new hybrid dopant technology of plasma immersion ion implant (PIII) with traditional ion implant. This method was demonstrated to effectively reduce contact resistance and increase driving current of 18% in FinFET device. A remarkable improvement of sub-threshold swing (24%) and DIBL (36%) were also reported in this work. A low resistance of TiSi silicide process are incorporated in our FinFET platform to achieve a higher Ion/Ioff current ratio of 106. The whole device fabrication can be fully integrated in CMOS device.

AB - In this work, a sub-10 nm high-κ/metal gate (HKMG) bulk fin-type field effect transistor (FinFET) devices with symmetrical N/PMOS characteristic were fabricated by a new hybrid dopant technology of plasma immersion ion implant (PIII) with traditional ion implant. This method was demonstrated to effectively reduce contact resistance and increase driving current of 18% in FinFET device. A remarkable improvement of sub-threshold swing (24%) and DIBL (36%) were also reported in this work. A low resistance of TiSi silicide process are incorporated in our FinFET platform to achieve a higher Ion/Ioff current ratio of 106. The whole device fabrication can be fully integrated in CMOS device.

KW - FinFET

KW - Plasma Immersion Ion Implant (PIII)

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U2 - 10.1109/IIT.2016.7882844

DO - 10.1109/IIT.2016.7882844

M3 - 會議論文篇章

AN - SCOPUS:85018606765

T3 - Proceedings of the International Conference on Ion Implantation Technology

BT - 2016 21st International Conference on Ion Implantation Technology, IIT 2016

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 21st International Conference on Ion Implantation Technology, IIT 2016

Y2 - 26 September 2016 through 30 September 2016

ER -

Chen YJ, Tang YT, Lin CH, Chen CC, Duchaine J, Spiegel Y et al. A Hybrid Implant Doping Technique with Plasma Immersion Ion Implant (PIII) Process for 10 nm Fin Cannel of 3D-FET. In 2016 21st International Conference on Ion Implantation Technology, IIT 2016. Institute of Electrical and Electronics Engineers Inc. 2017. 7882844. (Proceedings of the International Conference on Ion Implantation Technology). doi: 10.1109/IIT.2016.7882844

A Hybrid Implant Doping Technique with Plasma Immersion Ion Implant (PIII) Process for 10 nm Fin Cannel of 3D-FET

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Keywords

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