A fast mode decision algorithm and its vlsi design for H.264/AVC intra-prediction

Jia Ching Wang, Jhing Fa Wang, Jar Ferr Yang, Jang Ting Chen

Research output: Contribution to journalArticlepeer-review

108 Scopus citations

Abstract

In this paper, we present a fast mode decision algorithm and design its VLSI architecture for H.264 intra-prediction. A regular spatial domain filtering technique is proposed to compute the dominant edge strength (DES) to reduce the possible predictive modes. Experimental results revealed that the proposed fast intra-algorithm reduces 40% computation with slight peak signal-to-noise ratio (PSNR) degradation. The designed DES VLSI engine comprises a zigzag converter, a DES finite-state machine (FSM), and a DES core. The former two units handle memory allocation and control flow while the last performs pseudoblock computation, edge filtering, and dominant edge strength extraction. With semicustom design fabricated by 0.18-μm CMOS single-poly-six-metal technology, the realized die size is roughly 0.15 × 0.15 mm2 and can be operated at 66 MHz.

Original languageEnglish
Pages (from-to)1414-1422
Number of pages9
JournalIEEE Transactions on Circuits and Systems for Video Technology
Volume17
Issue number10
DOIs
StatePublished - Oct 2007

Keywords

  • Advanced video coding (AVC)
  • Dominant edge extraction
  • H264
  • Intra-mode decision
  • Intra-prediction

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