A fast-lock mixed-mode DLL with wide-range operation and multiphase outputs

Keyphrases

• Multi-phase Outputs 100%
• Wide Operation Range 100%
• Mixed Mode 100%
• Fast Lock 100%
• Lock Time 66%
• Supply Voltage 33%
• Measurement Results 33%
• Root Mean Square 33%
• Locking Range 33%
• CMOS Process 33%
• Single-poly 33%
• SPICE Model 33%
• Start-up Circuit 33%
• Small Area 33%
• Delay-locked Loop 33%
• Jitter 33%
• Charge Pump Circuit 33%
• Jitter Performance 33%
• Cycle Basis 33%
• Digital Control 33%
• Delay Cell 33%
• Voltage Controlled Delay Line 33%
• Peak-to-peak Jitter 33%
• Mode Delay 33%
• Clock Frequency 33%
• Time-to-digital Converter 33%
• Control Delay 33%
• DLL1 33%
• Less Power 33%
• Phase Clock 33%
• Low Jitter 33%

Engineering

• Range Operation 100%
• Mixed Mode 100%
• Clock Cycle 66%
• Simulation Result 33%
• Power Supply 33%
• Supply Voltage 33%
• Range Selector 33%
• Clock Frequency 33%
• Charge Pump Circuits 33%
• Locked Loop 33%
• Mode Time 33%
• Digital Converter 33%
• Electric Delay Lines 33%