A CMOS low power and high noise immunity voltage controlled oscillator

Kuo Hsing Cheng, Wei Bin Yang, Shyh Shyuan Sheu

Research output: Chapter in Book/Report/Conference proceedingChapterpeer-review

Abstract

In this paper, a low power and high noise immunity VCO is proposed and analyzed. The novel voltage controlled oscillator (VCO) is proposed to reduce the total power consumption for half-digital phase locked loop (HDPLL) application. By HSPICE simulation results, the power dissipation of the low-power VCO can be reduced over 50% in comparison to conventional VCO. Moreover, the novel VCO also have good immunity in noises. For example, the new VCO have low jitter and low power-supply noise. Thus, the novel VCO can be used in the high performance HDPLL.

Original languageEnglish
Title of host publicationRecent Advances in Circuits, Systems and Signal Processing
PublisherWorld Scientific and Engineering Academy and Society
Pages62-64
Number of pages3
ISBN (Print)9608052645
StatePublished - 2002

Keywords

  • Charge Pump(CP)
  • Frequency divider(FD)
  • Half-Digital Phase Locked Loop(HDPLL)
  • Loop Filter(LP)
  • Phase Detector(PD)
  • Voltage controlled Oscillator(VCO)

Fingerprint

Dive into the research topics of 'A CMOS low power and high noise immunity voltage controlled oscillator'. Together they form a unique fingerprint.

Cite this