A CMOS charge pump for sub-2.0V operation

Kuo Hsing Cheng, Chung Yu Chang, Chia Hung Wei

Research output: Contribution to journalConference articlepeer-review

18 Scopus citations


A new charge pump circuit is proposed in this paper. The major factors that will limit the charge pump gain and efficiency are threshold voltage drop and body effect. In this paper, the proposed positive charge pump circuit uses the charge transfer switches and floating well structure to eliminate the threshold voltage drop and the body effect problems. Due to the new circuit scheme, the new charge pump circuit can be used in a conventional n-well CMOS process for low supply voltage (2 V to 0.9 V) and have high charge pump gain and efficiency. The proposed circuit is based on the 0.25 μm CMOS technology, and the clock frequency is 50 MHz.

Original languageEnglish
Pages (from-to)V89-V92
JournalProceedings - IEEE International Symposium on Circuits and Systems
StatePublished - 2003
EventProceedings of the 2003 IEEE International Symposium on Circuits and Systems - Bangkok, Thailand
Duration: 25 May 200328 May 2003


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