A channel-sharable built-in self-test scheme for multi-channel DRAMs

Kuan Te Wu, Jin Fu Li, Chih Yen Lo, Jenn Shiang Lai, Ding Ming Kwai, Yung Fa Chou

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

2 Finished

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Finished
Testing and Reliability-Enhancement Techniques for Stacked Memories(2/3)
Li, J.
1/08/17 → 31/07/18
Project: Research
Testing of Emerging Nonvolatile-Based Memories for Iot(2/3)
Li, J.
1/08/17 → 31/07/18
Project: Research