@inproceedings{1ef2251008494b04964da3358b1cdefd,
title = "A built-in self-repair scheme for multiport RAMs",
abstract = "Built-in self-repair (BISR) techniques have been widely used for enhancing the yield of embedded memories. This paper presents an efficient BISR scheme for multiport RAMs (MPRAMs). The BISR scheme has a defect-location module (DLM) executing a defect-location algorithm to locate inter-port defects. This enhances the fault-location capability of the applied test algorithm with only a few amount of cost of testing time. A built-in redundancy analyzer (BIRA) executing a proposed redundancy analysis algorithm is also proposed to allocate two-dimension redundancy of MPRAMs. Experimental results show that if a faulty MPRAM has 20% inter-port faults, the DLM can boost the increment of repair rate from 8.4% to 14.4% for different redundancy configurations. The area cost of the BIRA and DLM is small, it is only about 1% for a 4096 × 128-bit MPRAM with 1 spare row and 1 spare IO.",
author = "Tseng, {Tsu Wei} and Wu, {Chun Hsien} and Huang, {Yu Jen} and Li, {Jin Fu} and Alex Pao and Kevin Chiu and Eliot Chen",
year = "2007",
doi = "10.1109/VTS.2007.4",
language = "???core.languages.en_GB???",
isbn = "0769528120",
series = "Proceedings of the IEEE VLSI Test Symposium",
pages = "355--360",
booktitle = "Proceedings - 25th IEEE VLSI Test Symposium, VTS'07",
note = "25th IEEE VLSI Test Symposium, VTS'07 ; Conference date: 06-05-2007 Through 10-05-2007",
}