A built-in self-repair method for RAMs in mesh-based NoCs

Hsiang Ning Liu, Yu Jen Huang, Jin Fu Li

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Network-on-chip is one popular interconnection infrastructure for giga-scale integrated chips. Moreover, the number of memory cores in such chips usually is very large. This paper proposes an efficient built-in self-repair (BISR) method for repairing memories in NoCs. By reusing the communication links in NoCs, the BISR scheme can repair multiple memories using one BISR circuit without incurring the problem of routing. To increase the repair efficiency, a global spare memory is designed for repairing multiple memories. Experimental results show that the proposed BISR scheme can achieve very high repair efficiency. Also, the area overhead of the BISR circuit is very low-only about 1.38% for fifteen 8K×64-bit memories.

Original languageEnglish
Title of host publication2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09
Pages259-262
Number of pages4
DOIs
StatePublished - 2009
Event2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09 - Hsinchu, Taiwan
Duration: 28 Apr 200930 Apr 2009

Publication series

Name2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09

Conference

Conference2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09
Country/TerritoryTaiwan
CityHsinchu
Period28/04/0930/04/09

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