A body sensor node SoC for ECG/EMG applications with compressed sensing and wireless powering

Yo Hao Tu; Kai Wen Yao; Ming Hao Huang; Yu Yun Lin; Hao Yu Chi; Po Min Cheng; Pei Yun Tsai; Muh Tian Shiue; Chien Nan Liu; Kuo Hsing Cheng; Jia Shiang Fu

doi:10.1109/VLSI-DAT.2017.7939668

A body sensor node SoC for ECG/EMG applications with compressed sensing and wireless powering

Yo Hao Tu, Kai Wen Yao, Ming Hao Huang, Yu Yun Lin, Hao Yu Chi, Po Min Cheng, Pei Yun Tsai, Muh Tian Shiue, Chien Nan Liu, Kuo Hsing Cheng, Jia Shiang Fu

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Scopus citations

Abstract

A body sensor node system-on-chip (SoC) is designed and implemented. The SoC integrates analog front end (AFE), a high-resolution analog-to-digital converter (ADC), an RF-to-DC rectifier, a low dropout (LDO) regulator, and a digital signal processing (DSP) block. The batteryless SoC is powered by RF of 2.45GHz. The rectifier generates 1.8V output and the LDO converts the voltage to stable 1.6V supply for AFE, ADC, and DSP blocks. A pseudo-resistor with huge resistance is used in AFE to support tunable low cut-off frequency and to facilitate compact SoC integration. The DSP can be set to deliver raw data, wavelet-domain data, and compressed-sensing (CS) data. The entire SoC is 1.7×2.5 mm² and can support invasive/non-invasive health-monitoring with low power consumption.

Original language	English
Title of host publication	2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781509039692
DOIs	https://doi.org/10.1109/VLSI-DAT.2017.7939668
State	Published - 5 Jun 2017
Event	2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017 - Hsinchu, Taiwan Duration: 24 Apr 2017 → 27 Apr 2017

Publication series

Name	2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017

Conference

Conference	2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
Country/Territory	Taiwan
City	Hsinchu
Period	24/04/17 → 27/04/17

Access to Document

10.1109/VLSI-DAT.2017.7939668

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Tu, Y. H., Yao, K. W., Huang, M. H., Lin, Y. Y., Chi, H. Y., Cheng, P. M., Tsai, P. Y., Shiue, M. T., Liu, C. N., Cheng, K. H., & Fu, J. S. (2017). A body sensor node SoC for ECG/EMG applications with compressed sensing and wireless powering. In 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017 Article 7939668 (2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-DAT.2017.7939668

Tu, Yo Hao ; Yao, Kai Wen ; Huang, Ming Hao et al. / A body sensor node SoC for ECG/EMG applications with compressed sensing and wireless powering. 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017. Institute of Electrical and Electronics Engineers Inc., 2017. (2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017).

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title = "A body sensor node SoC for ECG/EMG applications with compressed sensing and wireless powering",

abstract = "A body sensor node system-on-chip (SoC) is designed and implemented. The SoC integrates analog front end (AFE), a high-resolution analog-to-digital converter (ADC), an RF-to-DC rectifier, a low dropout (LDO) regulator, and a digital signal processing (DSP) block. The batteryless SoC is powered by RF of 2.45GHz. The rectifier generates 1.8V output and the LDO converts the voltage to stable 1.6V supply for AFE, ADC, and DSP blocks. A pseudo-resistor with huge resistance is used in AFE to support tunable low cut-off frequency and to facilitate compact SoC integration. The DSP can be set to deliver raw data, wavelet-domain data, and compressed-sensing (CS) data. The entire SoC is 1.7×2.5 mm2 and can support invasive/non-invasive health-monitoring with low power consumption.",

author = "Tu, {Yo Hao} and Yao, {Kai Wen} and Huang, {Ming Hao} and Lin, {Yu Yun} and Chi, {Hao Yu} and Cheng, {Po Min} and Tsai, {Pei Yun} and Shiue, {Muh Tian} and Liu, {Chien Nan} and Cheng, {Kuo Hsing} and Fu, {Jia Shiang}",

note = "Publisher Copyright: {\textcopyright} 2017 IEEE.; 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017 ; Conference date: 24-04-2017 Through 27-04-2017",

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Tu, YH, Yao, KW, Huang, MH, Lin, YY, Chi, HY, Cheng, PM, Tsai, PY, Shiue, MT, Liu, CN, Cheng, KH & Fu, JS 2017, A body sensor node SoC for ECG/EMG applications with compressed sensing and wireless powering. in 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017., 7939668, 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Institute of Electrical and Electronics Engineers Inc., 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Hsinchu, Taiwan, 24/04/17. https://doi.org/10.1109/VLSI-DAT.2017.7939668

A body sensor node SoC for ECG/EMG applications with compressed sensing and wireless powering. / Tu, Yo Hao; Yao, Kai Wen; Huang, Ming Hao et al.
2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017. Institute of Electrical and Electronics Engineers Inc., 2017. 7939668 (2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Cheng, Po Min

AU - Tsai, Pei Yun

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AB - A body sensor node system-on-chip (SoC) is designed and implemented. The SoC integrates analog front end (AFE), a high-resolution analog-to-digital converter (ADC), an RF-to-DC rectifier, a low dropout (LDO) regulator, and a digital signal processing (DSP) block. The batteryless SoC is powered by RF of 2.45GHz. The rectifier generates 1.8V output and the LDO converts the voltage to stable 1.6V supply for AFE, ADC, and DSP blocks. A pseudo-resistor with huge resistance is used in AFE to support tunable low cut-off frequency and to facilitate compact SoC integration. The DSP can be set to deliver raw data, wavelet-domain data, and compressed-sensing (CS) data. The entire SoC is 1.7×2.5 mm2 and can support invasive/non-invasive health-monitoring with low power consumption.

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Tu YH, Yao KW, Huang MH, Lin YY, Chi HY, Cheng PM et al. A body sensor node SoC for ECG/EMG applications with compressed sensing and wireless powering. In 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017. Institute of Electrical and Electronics Engineers Inc. 2017. 7939668. (2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017). doi: 10.1109/VLSI-DAT.2017.7939668

A body sensor node SoC for ECG/EMG applications with compressed sensing and wireless powering

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