A 90 nm CMOS low phase noise sub-harmonically injection-locked voltage-controlled oscillator with FLL self-alignment technique

Yen Liang Yeh; Shu Yan Huang; Yi En Shen; Hong Yeh Chang

doi:10.1109/MWSYM.2016.7539979

A 90 nm CMOS low phase noise sub-harmonically injection-locked voltage-controlled oscillator with FLL self-alignment technique

Yen Liang Yeh, Shu Yan Huang, Yi En Shen, Hong Yeh Chang

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

4 Scopus citations

Abstract

An innovative low phase noise sub-harmonically injection-locked voltage-controlled oscillator (SILVCO) with frequency-locked loop (FLL) self-alignment technique is presented in this paper using 90 nm CMOS process. To overcome the issue of narrow locking range, the control voltage of the SILVCO is adaptively adjusted using the FLL technique to refer to the sub-harmonic input frequency. This work demonstrates excellent robustness over temperature variation from 10°C to 70° C. Under the locking condition of the SILVCO with FLL, the measured minimum phase noise is -130.4 dBc/Hz at 1 MHz offset, the measured minimum jitter integrated from 50 kHz to 80 MHz is lower than 30.5 fs, and the output frequency is from 9.9 to 10.4 GHz. The circuit performance can be compared to the advanced CMOS low phase noise clock generators.

Original language	English
Title of host publication	2016 IEEE MTT-S International Microwave Symposium, IMS 2016
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781509006984
DOIs	https://doi.org/10.1109/MWSYM.2016.7539979
State	Published - 9 Aug 2016
Event	2016 IEEE MTT-S International Microwave Symposium, IMS 2016 - San Francisco, United States Duration: 22 May 2016 → 27 May 2016

Publication series

Name	IEEE MTT-S International Microwave Symposium Digest
Volume	2016-August
ISSN (Print)	0149-645X

Conference

Conference	2016 IEEE MTT-S International Microwave Symposium, IMS 2016
Country/Territory	United States
City	San Francisco
Period	22/05/16 → 27/05/16

Keywords

CMOS
VCO
frequency-locked loop
injection locking
low phase noise
microwave

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10.1109/MWSYM.2016.7539979

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Yeh, Y. L., Huang, S. Y., Shen, Y. E., & Chang, H. Y. (2016). A 90 nm CMOS low phase noise sub-harmonically injection-locked voltage-controlled oscillator with FLL self-alignment technique. In 2016 IEEE MTT-S International Microwave Symposium, IMS 2016 Article 7539979 (IEEE MTT-S International Microwave Symposium Digest; Vol. 2016-August). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/MWSYM.2016.7539979

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abstract = "An innovative low phase noise sub-harmonically injection-locked voltage-controlled oscillator (SILVCO) with frequency-locked loop (FLL) self-alignment technique is presented in this paper using 90 nm CMOS process. To overcome the issue of narrow locking range, the control voltage of the SILVCO is adaptively adjusted using the FLL technique to refer to the sub-harmonic input frequency. This work demonstrates excellent robustness over temperature variation from 10°C to 70° C. Under the locking condition of the SILVCO with FLL, the measured minimum phase noise is -130.4 dBc/Hz at 1 MHz offset, the measured minimum jitter integrated from 50 kHz to 80 MHz is lower than 30.5 fs, and the output frequency is from 9.9 to 10.4 GHz. The circuit performance can be compared to the advanced CMOS low phase noise clock generators.",

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Yeh, YL, Huang, SY, Shen, YE & Chang, HY 2016, A 90 nm CMOS low phase noise sub-harmonically injection-locked voltage-controlled oscillator with FLL self-alignment technique. in 2016 IEEE MTT-S International Microwave Symposium, IMS 2016., 7539979, IEEE MTT-S International Microwave Symposium Digest, vol. 2016-August, Institute of Electrical and Electronics Engineers Inc., 2016 IEEE MTT-S International Microwave Symposium, IMS 2016, San Francisco, United States, 22/05/16. https://doi.org/10.1109/MWSYM.2016.7539979

A 90 nm CMOS low phase noise sub-harmonically injection-locked voltage-controlled oscillator with FLL self-alignment technique. / Yeh, Yen Liang; Huang, Shu Yan; Shen, Yi En et al.
2016 IEEE MTT-S International Microwave Symposium, IMS 2016. Institute of Electrical and Electronics Engineers Inc., 2016. 7539979 (IEEE MTT-S International Microwave Symposium Digest; Vol. 2016-August).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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PY - 2016/8/9

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N2 - An innovative low phase noise sub-harmonically injection-locked voltage-controlled oscillator (SILVCO) with frequency-locked loop (FLL) self-alignment technique is presented in this paper using 90 nm CMOS process. To overcome the issue of narrow locking range, the control voltage of the SILVCO is adaptively adjusted using the FLL technique to refer to the sub-harmonic input frequency. This work demonstrates excellent robustness over temperature variation from 10°C to 70° C. Under the locking condition of the SILVCO with FLL, the measured minimum phase noise is -130.4 dBc/Hz at 1 MHz offset, the measured minimum jitter integrated from 50 kHz to 80 MHz is lower than 30.5 fs, and the output frequency is from 9.9 to 10.4 GHz. The circuit performance can be compared to the advanced CMOS low phase noise clock generators.

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Yeh YL, Huang SY, Shen YE, Chang HY. A 90 nm CMOS low phase noise sub-harmonically injection-locked voltage-controlled oscillator with FLL self-alignment technique. In 2016 IEEE MTT-S International Microwave Symposium, IMS 2016. Institute of Electrical and Electronics Engineers Inc. 2016. 7539979. (IEEE MTT-S International Microwave Symposium Digest). doi: 10.1109/MWSYM.2016.7539979

A 90 nm CMOS low phase noise sub-harmonically injection-locked voltage-controlled oscillator with FLL self-alignment technique

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