A 5ns fast write multi-level non-volatile 1 K bits RRAM memory with advance write scheme

Shyh Shyuan Sheu, Pei Chia Chiang, Wen Pin Lin, Heng Yuan Lee, Pang Shiu Chen, Yu Sheng Chen, Tai Yuan Wu, Frederick T. Chen, Keng Li Su, Ming Jer Kao, Kuo Hsing Cheng, Ming Jinn Tsai

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

95 Scopus citations

Abstract

A 1-Kb HfO2 based RRAM for high speed nonvolatile memory application is proposed. With this chip, a high speed write characteristic in the RRAM cell can be achieved. The present circuit design includes a 1T1R RRAM (1 transistor/1 resistive memory) cell and a voltage write circuit, which limit the current through the memory cell. The random write time at VDD = 3.3V is as fast as 5 ns in the RRAM, which were fabricated with a 0.18 m TSMC process.

Original languageEnglish
Title of host publication2009 Symposium on VLSI Circuits
Pages82-83
Number of pages2
StatePublished - 2009
Event2009 Symposium on VLSI Circuits - Kyoto, Japan
Duration: 16 Jun 200918 Jun 2009

Publication series

NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers

Conference

Conference2009 Symposium on VLSI Circuits
Country/TerritoryJapan
CityKyoto
Period16/06/0918/06/09

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