@inproceedings{2b517b3954664d8ea7e39180228d329a,
title = "A 4x4 64-QAM reduced-complexity K-best MIMO detector up to 1.5Gbps",
abstract = "In this paper, a VLSI architecture of a reduced-complexity K-best sphere decoder is designed, which aims to solve the 4 x 4 64-QAM multiple-input multiple-output (MIMO) signal detection problems in high-speed applications. We propose a fully-pipelined sorter, which can generate one result per clock cycle and thus greatly enhance the detection throughput. On the other hand, various K values are adopted at each layer to save the hardware complexity. The proposed design has been implemented in 0.18 μm CMOS technology and has 366K gates. From post-layout simulation, this work achieves a detection rate of 1.5 Gbps at 62.5-MHz clock frequency.",
author = "Tsai, {Pei Yun} and Chen, {Wei Tzuo} and Lin, {Xing Cheng} and Huang, {Meng Yuan}",
year = "2010",
doi = "10.1109/ISCAS.2010.5537675",
language = "???core.languages.en_GB???",
isbn = "9781424453085",
series = "ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems",
pages = "3953--3956",
booktitle = "ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems",
note = "2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010 ; Conference date: 30-05-2010 Through 02-06-2010",
}