A 36-42 GHz 0.18-μm CMOS Amplifier Using Cascode-Cascade Matching Topology for Millimeter-wave Broadband Applications

Rou Yin Huang, Miao Ting Fang, Po Yuan Chen, Hong Yeh Chang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this paper, a Q-band low noise amplifier (LNA) is presented using a 0.18-μ m CMOS process for millimeter-wave broadband applications. The LNA is composed of common-source (CS) and cascode gain stages to achieve high small-signal gain with broad bandwidth. The bandwidth of the LNA can be further enhanced due to the low-quality matching between the CS and cascode stages. The chip size of the LNA is 0.8 × 0.7 mm2. The measured maximum small-signal gain is 15.3 dB with a 3-dB bandwidth from 35.7 to 41. 7 GHz. The measured noise figure is between 7.3 and 9 dB. The total dc power consumption is 73 mW.

Original languageEnglish
Title of host publication2023 Asia-Pacific Microwave Conference, APMC 2023
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages626-628
Number of pages3
ISBN (Electronic)9781665494182
DOIs
StatePublished - 2023
Event31st Asia-Pacific Microwave Conference, APMC 2023 - Taipei, Taiwan
Duration: 5 Dec 20238 Dec 2023

Publication series

NameAsia-Pacific Microwave Conference Proceedings, APMC
ISSN (Electronic)2690-3946

Conference

Conference31st Asia-Pacific Microwave Conference, APMC 2023
Country/TerritoryTaiwan
CityTaipei
Period5/12/238/12/23

Keywords

  • broadband
  • CMOS
  • low noise amplifier (LNA)
  • millimeter-wave
  • RFIC

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