A 30-GHz 10-dB low noise amplifier using standard 0.18-μm CMOS technology

Hsin Lung Tu; Tsung Yu Yang; Kung Hao Liang; Hwann Kaeo Chiou

doi:10.1002/mop.22226

A 30-GHz 10-dB low noise amplifier using standard 0.18-μm CMOS technology

Hsin Lung Tu, Tsung Yu Yang, Kung Hao Liang, Hwann Kaeo Chiou

Department of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

2 Scopus citations

Abstract

A three-stage 30-GHz law noise amplifier (LNA) was designed and fabricated in a standard 0.18-μm CMOS technology. The LNA has demonstrated a 10-dB gain and a minimum noise figure of 5.2 dB at 30 GHz. The achieved input 1-dB compression point (IP_{1 dB}) and third order intercept point (IP3) are -7 and +2.5 dBm, with total current of 16 mA from a 1.5-V power supply. To the author's knowledge, the LNA shows the best overall performances ever reported in standard0.18-μm CMOS process.

Original language	English
Pages (from-to)	647-649
Number of pages	3
Journal	Microwave and Optical Technology Letters
Volume	49
Issue number	3
DOIs	https://doi.org/10.1002/mop.22226
State	Published - Mar 2007

Keywords

0.18-μm CMOS
Low noise amplifier
MMIC

Access to Document

10.1002/mop.22226

Cite this

@article{05a2924fed89470fba5814270affceae,

title = "A 30-GHz 10-dB low noise amplifier using standard 0.18-μm CMOS technology",

abstract = "A three-stage 30-GHz law noise amplifier (LNA) was designed and fabricated in a standard 0.18-μm CMOS technology. The LNA has demonstrated a 10-dB gain and a minimum noise figure of 5.2 dB at 30 GHz. The achieved input 1-dB compression point (IP1 dB) and third order intercept point (IP3) are -7 and +2.5 dBm, with total current of 16 mA from a 1.5-V power supply. To the author's knowledge, the LNA shows the best overall performances ever reported in standard0.18-μm CMOS process.",

keywords = "0.18-μm CMOS, Low noise amplifier, MMIC",

author = "Tu, {Hsin Lung} and Yang, {Tsung Yu} and Liang, {Kung Hao} and Chiou, {Hwann Kaeo}",

year = "2007",

month = mar,

doi = "10.1002/mop.22226",

language = "???core.languages.en_GB???",

volume = "49",

pages = "647--649",

journal = "Microwave and Optical Technology Letters",

issn = "0895-2477",

number = "3",

}

TY - JOUR

T1 - A 30-GHz 10-dB low noise amplifier using standard 0.18-μm CMOS technology

AU - Tu, Hsin Lung

AU - Yang, Tsung Yu

AU - Liang, Kung Hao

AU - Chiou, Hwann Kaeo

PY - 2007/3

Y1 - 2007/3

N2 - A three-stage 30-GHz law noise amplifier (LNA) was designed and fabricated in a standard 0.18-μm CMOS technology. The LNA has demonstrated a 10-dB gain and a minimum noise figure of 5.2 dB at 30 GHz. The achieved input 1-dB compression point (IP1 dB) and third order intercept point (IP3) are -7 and +2.5 dBm, with total current of 16 mA from a 1.5-V power supply. To the author's knowledge, the LNA shows the best overall performances ever reported in standard0.18-μm CMOS process.

AB - A three-stage 30-GHz law noise amplifier (LNA) was designed and fabricated in a standard 0.18-μm CMOS technology. The LNA has demonstrated a 10-dB gain and a minimum noise figure of 5.2 dB at 30 GHz. The achieved input 1-dB compression point (IP1 dB) and third order intercept point (IP3) are -7 and +2.5 dBm, with total current of 16 mA from a 1.5-V power supply. To the author's knowledge, the LNA shows the best overall performances ever reported in standard0.18-μm CMOS process.

KW - 0.18-μm CMOS

KW - Low noise amplifier

KW - MMIC

UR - http://www.scopus.com/inward/record.url?scp=33847764664&partnerID=8YFLogxK

U2 - 10.1002/mop.22226

DO - 10.1002/mop.22226

M3 - 期刊論文

AN - SCOPUS:33847764664

VL - 49

SP - 647

EP - 649

JO - Microwave and Optical Technology Letters

JF - Microwave and Optical Technology Letters

SN - 0895-2477

IS - 3

ER -

A 30-GHz 10-dB low noise amplifier using standard 0.18-μm CMOS technology

Abstract

Keywords

Access to Document

Fingerprint

Cite this