A three-stage 30-GHz law noise amplifier (LNA) was designed and fabricated in a standard 0.18-μm CMOS technology. The LNA has demonstrated a 10-dB gain and a minimum noise figure of 5.2 dB at 30 GHz. The achieved input 1-dB compression point (IP1 dB) and third order intercept point (IP3) are -7 and +2.5 dBm, with total current of 16 mA from a 1.5-V power supply. To the author's knowledge, the LNA shows the best overall performances ever reported in standard0.18-μm CMOS process.
- 0.18-μm CMOS
- Low noise amplifier