A 27-GHz 45-dB SFDR track-and-hold amplifier using modified darlington amplifier and cascoded SEF in 0.18-μm SiGe process

Yu An Lin, Ya Che Yeh, Hong Yeh Chang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Scopus citations

Abstract

A broadband high-speed high-linearity track-and-hold amplifier (THA) is presented in this paper using 0.18 μm SiGe process. A switched emitter follower track-and-hold (T/H) stage with cascode stage is adopted to achieve high resolution for analog-to-digital conversion. A modified Darlington amplifier with peaking technique is used to enhance the input bandwidth. With a dc power consumption of 94.3 mW, the proposed THA demonstrates a 3-dB input bandwidth from DC to 27 GHz, a maximum spurious-free dynamic range of 45 dB, and a minimum total harmonic distortion of -40 dB. The proposed circuit has potential for high-speed high-dynamic-range applications due to its superior performance.

Original languageEnglish
Title of host publication2017 IEEE MTT-S International Microwave Symposium, IMS 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages137-140
Number of pages4
ISBN (Electronic)9781509063604
DOIs
StatePublished - 4 Oct 2017
Event2017 IEEE MTT-S International Microwave Symposium, IMS 2017 - Honololu, United States
Duration: 4 Jun 20179 Jun 2017

Publication series

NameIEEE MTT-S International Microwave Symposium Digest
ISSN (Print)0149-645X

Conference

Conference2017 IEEE MTT-S International Microwave Symposium, IMS 2017
Country/TerritoryUnited States
CityHonololu
Period4/06/179/06/17

Keywords

  • High-speed analog CMOS design
  • RF and mixed signal IC design
  • RF front ends
  • Sampling circuits
  • SiGe

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