A 14-bit, 200 MS/s digital-to-analog converter without trimming

Kuo Hsing Cheng; Tsung Shen Chen; Chia Ming Tu

A 14-bit, 200 MS/s digital-to-analog converter without trimming

Kuo Hsing Cheng, Tsung Shen Chen, Chia Ming Tu

Department of Electrical Engineering

Research output: Contribution to journal › Conference article › peer-review

2 Scopus citations

Abstract

In this paper, a 14-bit, low DNL, INL error, 200M sample/s, current-steering digital to analog converter (DAC) without trimming is proposed and analyzed. A novel feedback gain stage current mirror is proposed for improving the DAC's differential non-linearity (DNL) and integral non-linearity (INL) characteristic. The post-layout simulation results show that both of the DNL and INL performance of this DAC are good. Moreover even considers Vt and β parameters mismatch, the DNL and INL are lower than ± 0.5 least significant bit (LSB).

Original language	English
Pages (from-to)	I353-I356
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	1
State	Published - 2004
Event	2004 IEEE International Symposium on Cirquits and Systems - Proceedings - Vancouver, BC, Canada Duration: 23 May 2004 → 26 May 2004

Cite this

@article{1f25de286116451eb4b8a231334c327a,

title = "A 14-bit, 200 MS/s digital-to-analog converter without trimming",

abstract = "In this paper, a 14-bit, low DNL, INL error, 200M sample/s, current-steering digital to analog converter (DAC) without trimming is proposed and analyzed. A novel feedback gain stage current mirror is proposed for improving the DAC's differential non-linearity (DNL) and integral non-linearity (INL) characteristic. The post-layout simulation results show that both of the DNL and INL performance of this DAC are good. Moreover even considers Vt and β parameters mismatch, the DNL and INL are lower than ± 0.5 least significant bit (LSB).",

author = "Cheng, {Kuo Hsing} and Chen, {Tsung Shen} and Tu, {Chia Ming}",

year = "2004",

language = "???core.languages.en_GB???",

volume = "1",

pages = "I353--I356",

journal = "Proceedings - IEEE International Symposium on Circuits and Systems",

issn = "0271-4310",

note = "2004 IEEE International Symposium on Cirquits and Systems - Proceedings ; Conference date: 23-05-2004 Through 26-05-2004",

}

TY - JOUR

T1 - A 14-bit, 200 MS/s digital-to-analog converter without trimming

AU - Cheng, Kuo Hsing

AU - Chen, Tsung Shen

AU - Tu, Chia Ming

PY - 2004

Y1 - 2004

N2 - In this paper, a 14-bit, low DNL, INL error, 200M sample/s, current-steering digital to analog converter (DAC) without trimming is proposed and analyzed. A novel feedback gain stage current mirror is proposed for improving the DAC's differential non-linearity (DNL) and integral non-linearity (INL) characteristic. The post-layout simulation results show that both of the DNL and INL performance of this DAC are good. Moreover even considers Vt and β parameters mismatch, the DNL and INL are lower than ± 0.5 least significant bit (LSB).

AB - In this paper, a 14-bit, low DNL, INL error, 200M sample/s, current-steering digital to analog converter (DAC) without trimming is proposed and analyzed. A novel feedback gain stage current mirror is proposed for improving the DAC's differential non-linearity (DNL) and integral non-linearity (INL) characteristic. The post-layout simulation results show that both of the DNL and INL performance of this DAC are good. Moreover even considers Vt and β parameters mismatch, the DNL and INL are lower than ± 0.5 least significant bit (LSB).

UR - http://www.scopus.com/inward/record.url?scp=4344595046&partnerID=8YFLogxK

M3 - 會議論文

AN - SCOPUS:4344595046

SN - 0271-4310

VL - 1

SP - I353-I356

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

T2 - 2004 IEEE International Symposium on Cirquits and Systems - Proceedings

Y2 - 23 May 2004 through 26 May 2004

ER -

A 14-bit, 200 MS/s digital-to-analog converter without trimming

Abstract

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