In this paper, a 14-bit, low DNL, INL error, 200M sample/s, current-steering digital to analog converter (DAC) without trimming is proposed and analyzed. A novel feedback gain stage current mirror is proposed for improving the DAC's differential non-linearity (DNL) and integral non-linearity (INL) characteristic. The post-layout simulation results show that both of the DNL and INL performance of this DAC are good. Moreover even considers Vt and β parameters mismatch, the DNL and INL are lower than ± 0.5 least significant bit (LSB).
|Journal||Proceedings - IEEE International Symposium on Circuits and Systems|
|State||Published - 2004|
|Event||2004 IEEE International Symposium on Cirquits and Systems - Proceedings - Vancouver, BC, Canada|
Duration: 23 May 2004 → 26 May 2004