@inproceedings{9030c7a8e26e489c8df455353938354e,
title = "A 1.2V 500MHz 32-bit carry-lookahead adder",
abstract = "In this paper a 1.2V 32-bit carry lookahead adder is proposed for high speed, low voltage applications. The proposed new 32-bit adder uses Non-full Voltage Swing True-Single-phase-Clocking Logic (NSTSPC) to implement the proposed carry lookahead adder. Because the internal node of NSTSPC was non-full swing, its operation speed would be higher than the conventional TSPC. Moreover, the supply voltage for the new adder is 1.2V, thus the power dissipation would also be reduced. The 32-bit CLA adder using 0.35um 1P4M CMOS technology with 1.2V power supply could be operated on 500MHz clock frequency.",
author = "Cheng, {Kuo Hsing} and Lee, {Wen Shiuan} and Huang, {Yung Chong}",
year = "2001",
language = "???core.languages.en_GB???",
isbn = "0780370570",
series = "Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems",
pages = "765--768",
booktitle = "ICECS 2001 - 8th IEEE International Conference on Electronics, Circuits and Systems",
note = "8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001 ; Conference date: 02-09-2001 Through 05-09-2001",
}